Davide Vecchi

According to our database, Davide Vecchi authored at least 13 papers between 2001 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2021

Species are, at the same time, kinds and individuals: a causal argument based on an empirical approach to species identity.

Elena Casetta, Davide Vecchi

Synth., 2021

2020

Entrenchment implies that physiological and developmental processes are not organism-bound but still organism-centric.

Davide Vecchi

Adapt. Behav., 2020

2015

26.3 An 800MS/S 10b/13b receiver for 10GBASE-T Ethernet in 28nm CMOS.

Jan Mulder, Davide Vecchi, Yi Ke, Stefano Bozzola, Mark Core, Nitz Saputra, Qiongna Zhang, Jeff Riley, Han Yan, Mattia Introini, Sijia Wang, Christopher M. Ward, Jan R. Westra, Jiansong Wan, Klaas Bult

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2014

8.5 A sub-1.75W full-duplex 10GBASE-T transceiver in 40nm CMOS.

Jan R. Westra, Jan Mulder, Yi Ke, Davide Vecchi, Xiaodong Liu, Erol Arslan, Jiansong Wan, Qiongna Zhang, Sijia Wang, Frank M. L. van der Goes, Klaas Bult

Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

Design considerations for low-power analog front ends in full-duplex 10GBASE-T transceivers.

Jan R. Westra, Jan Mulder, Yi Ke, Davide Vecchi, Xiaodong Liu, Erol Arslan, Jiansong Wan, Qiongna Zhang, Sijia Wang, Frank M. L. van der Goes, Klaas Bult

Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

2011

An 800 MS/s Dual-Residue Pipeline ADC in 40 nm CMOS.

Davide Vecchi, Jan Mulder, Frank M. L. van der Goes, Jan R. Westra, Emre Ayranci, Christopher M. Ward, Jiansong Wan, Klaas Bult

IEEE J. Solid State Circuits, 2011

An 800MS/s dual-residue pipeline ADC in 40nm CMOS.

Jan Mulder, Frank M. L. van der Goes, Davide Vecchi, Jan R. Westra, Emre Ayranci, Christopher M. Ward, Jiansong Wan, Klaas Bult

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2009

Single-Reference Foreground Calibration of High-Resolution, High-Speed Pipeline ADCs.

Andrea Boni, Cristiano Azzolini, Davide Vecchi, Giovanni Chiorboli

Circuits Syst. Signal Process., 2009

2006

Low-power GS/s track-and-hold with 10-b resolution at Nyquist in SiGe BiCMOS.

Andrea Boni, Matteo Parenti, Davide Vecchi

IEEE Trans. Circuits Syst. II Express Briefs, 2006

2005

Design of a 2-GS/s 8-b self-calibrating ADC in 0.18µm CMOS technology.

Cristiano Azzolini, Andrea Boni, Alessio Facen, Matteo Parenti, Davide Vecchi

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

DAC calibration by weighting capacitor rotation in a pipelined ADC.

Giovanni Chiorboli, Silvia Dondi, Carlo Morandi, Davide Vecchi

Proceedings of the Third IASTED International Conference on Circuits, 2005

100-MS/s 14-b track-and-hold amplifier in 0.18-μm CMOS.

Davide Vecchi, Cristiano Azzolini, Andrea Boni, Faouzi Chaahoub, Lorenzo Crespi

Proceedings of the 31st European Solid-State Circuits Conference, 2005

2001

LVDS I/O interface for Gb/s-per-pin operation in 0.35-μ/m CMOS.

Andrea Boni, Andrea Pierazzi, Davide Vecchi

IEEE J. Solid State Circuits, 2001