Davide Tierno

Orcid: 0000-0003-4915-904X

According to our database1, Davide Tierno authored at least 5 papers between 2020 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

2020
2021
2022
2023
2024
0
1
2
3
2
1
1
1

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Mitigating Line-Break Defectivity with a Sandwiched TiN or W Layer for Metal Pitch 18 NM Aspect Ratio 6 Semi-Damascene Interconnects.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

Pure-Metal Replacement Gate for Reliable 30 nm Pitch Scaled 3D NAND Flash.
Proceedings of the IEEE International Memory Workshop, 2024

2022
Reliability Investigation of W2W Hybrid Bonding Interface: Breakdown Voltage and Leakage Mechanism.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

2021
Reliability of Mo as Word Line Metal in 3D NAND.
Proceedings of the IEEE International Reliability Physics Symposium, 2021

2020
Dielectric Reliability Study of 21 nm Pitch Interconnects with Barrierless Ru Fill.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020


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