David Uliana

According to our database1, David Uliana authored at least 6 papers between 2013 and 2015.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2015
A 2.48Gb/s QC-LDPC Decoder Implementation on the NI USRP-2953R.
CoRR, 2015

A 2.48Gb/s FPGA-based QC-LDPC decoder: An algorithmic compiler implementation.
Proceedings of the 36th IEEE Sarnoff Symposium 2015, Newark, NJ, USA, 2015

2014
FPGA-based accelerator development for non-engineers.
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014

Rapid and high-level constraint-driven prototyping using lab VIEW FPGA.
Proceedings of the 2014 IEEE Global Conference on Signal and Information Processing, 2014

2013
FPGA-based HPC application design for non-experts (abstract only).
Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

FPGA-based HPC application design for non-experts.
Proceedings of the 24th International Conference on Application-Specific Systems, 2013


  Loading...