David Trilla
Orcid: 0000-0001-9402-7703
According to our database1,
David Trilla
authored at least 15 papers
between 2016 and 2024.
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Bibliography
2024
14.5 A 12nm Linux-SMP-Capable RISC-V SoC with 14 Accelerator Types, Distributed Hardware Power Management and Flexible NoC-Based Data Orchestration.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024
2021
IEEE Trans. Sustain. Comput., 2021
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021
Proceedings of the 27th IEEE International Symposium on On-Line Testing and Robust System Design, 2021
Proceedings of the 27th IEEE International Symposium on On-Line Testing and Robust System Design, 2021
Proceedings of the 26th IEEE European Test Symposium, 2021
2020
PhD thesis, 2020
2019
Randomization for Safer, more Reliable and Secure, High-Performance Automotive Processors.
IEEE Des. Test, 2019
Modeling the Impact of Process Variations in Worst-Case Energy Consumption Estimation.
Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019
An Approach for Detecting Power Peaks During Testing and Breaking Systematic Pathological Behavior.
Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019
2018
Cache side-channel attacks and time-predictability in high-performance critical real-time systems.
Proceedings of the 55th Annual Design Automation Conference, 2018
2017
Proceedings of the 12th IEEE International Symposium on Industrial Embedded Systems, 2017
2016
Proceedings of the 2016 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), 2016
Resilient random modulo cache memories for probabilistically-analyzable real-time systems.
Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016