David T. Harper III

According to our database, David T. Harper III authored at least 19 papers between 1984 and 1996.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

1996

An Efficient Memory System for the SIMD Construction of a Gaussian Pyramid.

Jong Won Park, David T. Harper III

IEEE Trans. Parallel Distributed Syst., 1996

1995

Hierarchy embedded differential image for progressive transmission using lossless compression.

Whoi-Yul Kim, Poras T. Balsara, David T. Harper III, Jon Wong Park

IEEE Trans. Circuits Syst. Video Technol., 1995

Performance analysis of disk cache write policies.

Douglas W. Miller, David T. Harper III

Microprocess. Microsystems, 1995

1994

A Multiaccess Frame Buffer Architecture.

David T. Harper III

IEEE Trans. Computers, 1994

1993

Analytical Estimation of Vector Access Performance in Parallel Memory Architectures.

David T. Harper III, Yashodara Costa

IEEE Trans. Computers, 1993

A Parallel Algorithm for Cache Miss Ratio Evaluation.

David T. Harper III, David Tuma

Proceedings of the MASCOTS '93, 1993

1992

Increased Memory Performance During Vector Accesses Through the use of Linear Address Transformations.

David T. Harper III

IEEE Trans. Computers, 1992

Memory Architecture Support for the SIMD Construction of a Gaussian Pyramid.

Jong Won Park, David T. Harper III

Proceedings of the Fourth IEEE Symposium on Parallel and Distributed Processing, 1992

1991

Block, Multistride Vector, and FFT Accesses in Parallel Memory Systems.

David T. Harper III

IEEE Trans. Parallel Distributed Syst., 1991

Conflict-Free Vector Access Using a Dynamic Storage Scheme.

David T. Harper III, Darel A. Linebarger

IEEE Trans. Computers, 1991

Reducing Memory Contention in Shared Memory Multiprocessors.

David T. Harper III

Proceedings of the 18th Annual International Symposium on Computer Architecture. Toronto, 1991

1990

Evaluation of Reduced Bandwidth Multistage Networks.

David T. Harper III, J. Robert Jump

J. Parallel Distributed Comput., 1990

1989

A Dynamic Storage Scheme for Conflict-Free Vector Access.

David T. Harper III, Darel A. Linebarger

Proceedings of the 16th Annual International Symposium on Computer Architecture. Jerusalem, 1989

Address Transformations to Increase Memory Performance.

David T. Harper III

Proceedings of the International Conference on Parallel Processing, 1989

1988

Storage Schemes for Efficient Computation of a Radix 2 FFT in a Machine with Parallel Memories.

David T. Harper III, Darel A. Linebarger

Proceedings of the International Conference on Parallel Processing, 1988

1987

Vector Access Performance in Parallel Memories Using a Skewed Storage Scheme.

David T. Harper III, J. Robert Jump

IEEE Trans. Computers, 1987

Performance Evaluation of Reduced Bandwidth Multistage Interconnection Networks.

David T. Harper III, J. Robert Jump

Proceedings of the 14th Annual International Symposium on Computer Architecture. Pittsburgh, 1987

1986

Performance Evaluation of Vector Accesses in Parallel Memories Using a Skewed Storage Scheme.

David T. Harper III, J. Robert Jump

Proceedings of the 13th Annual Symposium on Computer Architecture, Tokyo, Japan, June 1986, 1986

1984

An interleaved array-processing architecture.

J. Robert Jump, James D. Wise, David T. Harper III

Proceedings of the American Federation of Information Processing Societies: 1984 National Computer Conference, 1984