David Smékal

Orcid: 0000-0002-1996-5334

Affiliations:
  • Brno University of Technology, Brno, Czech Republic


According to our database1, David Smékal authored at least 13 papers between 2017 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Other 

Links

Online presence:

On csauthors.net:

Bibliography

2024
Pushing AES-256-GCM to Limits: Design, Implementation and Real FPGA Tests.
Proceedings of the Applied Cryptography and Network Security Workshops, 2024

2021
Implementing CRYSTALS-Dilithium Signature Scheme on FPGAs.
IACR Cryptol. ePrint Arch., 2021

Hardware-based Cryptographic Accelerator for Post Quantum Era.
Proceedings of the 13th International Congress on Ultra Modern Telecommunications and Control Systems and Workshops, 2021

Implementing CRYSTALS-Dilithium Signature Scheme on FPGAs.
Proceedings of the ARES 2021: The 16th International Conference on Availability, 2021

2020
Hardware-Accelerated Cryptography for Software-Defined Networks with P4.
Proceedings of the Innovative Security Solutions for Information Technology and Communications, 2020

2019
Towards Practical Deployment of Post-quantum Cryptography on Constrained Platforms and Hardware-Accelerated Platforms.
Proceedings of the Innovative Security Solutions for Information Technology and Communications, 2019

Modeling the Trade-off Between Security and Performance to Support the Product Life Cycle.
Proceedings of the 8th Mediterranean Conference on Embedded Computing, 2019

Privacy-enhancing Cloud Computing Solution for Big Data.
Proceedings of the 11th International Congress on Ultra Modern Telecommunications and Control Systems and Workshops, 2019

Adjustable Multiphase Sinusoidal Oscillator with Fractional-Order Elements.
Proceedings of the 11th International Congress on Ultra Modern Telecommunications and Control Systems and Workshops, 2019

2018
Hardware-Accelerated Twofish Core for FPGA.
Proceedings of the 41st International Conference on Telecommunications and Signal Processing, 2018

200 Gbps Hardware Accelerated Encryption System for FPGA Network Cards.
Proceedings of the 2018 Workshop on Attacks and Solutions in Hardware Security, 2018

2017
Packet generators on field programmable gate array platform.
Proceedings of the 40th International Conference on Telecommunications and Signal Processing, 2017

Methodology for correlations discovery in security logs.
Proceedings of the 9th International Congress on Ultra Modern Telecommunications and Control Systems and Workshops, 2017


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