David Navarro

Orcid: 0000-0002-1715-6584

According to our database¹, David Navarro authored at least 35 papers between 2002 and 2023.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

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On csauthors.net:

Bibliography

2023

FeFET based Logic-in-Memory design methodologies, tools and open challenges.

[BibT_eX]

[DOI]

Cédric Marchand

Alban Nicolas

Paul-Antoine Matrangolo

David Navarro

Alberto Bosio

Ian O'Connor

Proceedings of the 31st IFIP/IEEE International Conference on Very Large Scale Integration, 2023

Non Volatile Operators Emulation Platform.

[BibT_eX]

[DOI]

Alban Nicolas

Cédric Marchand

David Navarro

Proceedings of the 18th ACM International Symposium on Nanoscale Architectures, 2023

2022

Hardware Emulation of FeFET On FPGA.

[BibT_eX]

[DOI]

Paul-Antoine Matrangolo

Cédric Marchand

David Navarro

Ian O'Connor

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

2015

Performance evaluation of IEEE 802.15.4 sensor networks in industrial applications.

[BibT_eX]

[DOI]

Wan Du

David Navarro

Fabien Mieyeville

Int. J. Commun. Syst., 2015

Fast optical simulation from a reduced set of impulse responses using SystemC-AMS.

[BibT_eX]

[DOI]

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014

Modeling and simulation of networked low-power embedded systems: a taxonomy.

[BibT_eX]

[DOI]

EURASIP J. Wirel. Commun. Netw., 2014

A low power Wireless Sensor Node with Vibration Sensing and Energy Harvesting capability.

[BibT_eX]

[DOI]

Proceedings of the 2014 Federated Conference on Computer Science and Information Systems, 2014

2012

A cycle-accurate transaction-level modelled energy simulation approach for heterogeneous Wireless Sensor Networks.

[BibT_eX]

[DOI]

Proceedings of the 10th IEEE International NEWCAS Conference, 2012

Ambipolar independent double gate FET logic.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures, 2012

Low-power design technique with ambipolar double gate devices.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures, 2012

Ambipolar double gate CNTFETs based reconfigurable logic cells.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures, 2012

2011

IDEA1: A validated SystemC-based system-level design and simulation environment for wireless sensor networks.

[BibT_eX]

[DOI]

EURASIP J. Wirel. Commun. Netw., 2011

Wireless Sensor Networks for active control noise reduction in automotive domain.

[BibT_eX]

[DOI]

Proceedings of the 14th International Symposium on Wireless Personal Multimedia Communications, 2011

Reprogramming hardware-software heterogeneous Wireless Sensor Networks.

[BibT_eX]

[DOI]

Proceedings of the 14th International Symposium on Wireless Personal Multimedia Communications, 2011

IDEA1: A Validated System C-Based Simulator for Wireless Sensor Networks.

[BibT_eX]

[DOI]

Proceedings of the IEEE 8th International Conference on Mobile Adhoc and Sensor Systems, 2011

2010

IDEA1: A SystemC-based system-level simulator for wireless sensor networks.

[BibT_eX]

[DOI]

Wan Du

Fabien Mieyeville

David Navarro

Proceedings of the IEEE International Conference on Wireless Communications, 2010

Towards a taxonomy of simulation tools for wireless sensor networks.

[BibT_eX]

[DOI]

Proceedings of the 3rd International Conference on Simulation Tools and Techniques, 2010

Reducing transistor count in clocked standard cells with ambipolar double-gate FETs.

[BibT_eX]

[DOI]

Kotb Jabeur

David Navarro

Ian O'Connor

Pierre-Emmanuel Gaillardon

M. Haykel Ben Jamaa

Fabien Clermidy

Proceedings of the 2010 IEEE/ACM International Symposium on Nanoscale Architectures, 2010

A complete system-level behavioural model for IEEE 802.15.4 Wireless Sensor Network simulations.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Logic cells and interconnect strategies for nanoscale reconfigurable computing fabrics.

[BibT_eX]

[DOI]

Pierre-Emmanuel Gaillardon

M. Haykel Ben Jamaa

Fabien Clermidy

Proceedings of the 17th IEEE International Conference on Electronics, 2010

Dynamic reconfiguration inwireless Sensor Networks.

[BibT_eX]

[DOI]

Mihai Galos

Fabien Mieyeville

David Navarro

Proceedings of the 17th IEEE International Conference on Electronics, 2010

Graphical system-level simulations for Wireless Sensor Networks design space exploration at hardware and software levels.

[BibT_eX]

[DOI]

Proceedings of the 7th International Symposium on Communication Systems Networks and Digital Signal Processing, 2010

DipGame: a testbed for multiagent systems.

[BibT_eX]

[DOI]

Proceedings of the 9th International Conference on Autonomous Agents and Multiagent Systems (AAMAS 2010), 2010

2009

Emerging Technologies and Nanoscale Computing Fabrics.

[BibT_eX]

[DOI]

Pierre-Emmanuel Gaillardon

Fabien Clermidy

Maimouna Amadou

Gabriela Nicolescu

Proceedings of the VLSI-SoC: Technologies for Systems Integration, 2009

2008

Fine-Grain Reconfigurable Logic Cells Based on Double-Gate MOSFETs.

[BibT_eX]

[DOI]

Ian O'Connor

Ilham Hassoune

David Navarro

Proceedings of the VLSI-SoC: Design Methodologies for SoC and SiP, 2008

2007

A Family of Ultra-Fine Grain CNTFET-based Reconfigurable Logic Gates.

[BibT_eX]

Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2007

Design of a Novel CNTFET-based Reconfigurable Logic Gate.

[BibT_eX]

[DOI]

Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007

Ultra-fine grain reconfigurability using CNTFETs.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE International Conference on Electronics, 2007

Novel CNTFET-based Reconfigurable Logic Gate Design.

[BibT_eX]

[DOI]

Proceedings of the 44th Design Automation Conference, 2007

2005

Heterogeneous Modelling of an Optical Network-on-Chip with SystemC.

[BibT_eX]

[DOI]

Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping (RSP 2005), 2005

Towards reconfigurable optical networks on chip.

[BibT_eX]

Faress Tissafi-Drissi

Proceedings of the 1st International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2005

VHDL & VHDL-AMS Modelling and Simulation of a CMOS Imager IP.

[BibT_eX]

[DOI]

Proceedings of the Forum on specification and Design Languages, 2005

2004

Dynamic Visualization of Hubs and Authorities During Web Search.

[BibT_eX]

Richard H. Fowler

David Navarro

Wendy A. Lawrence-Fowler

Xusheng Wang

Proceedings of the International Conference on Internet Computing, 2004

2003

Efficient Text Content Extraction and Browsing of WWW Documents Using the Abstract Text Viewer.

[BibT_eX]

Proceedings of the International Conference on Internet Computing, 2003

2002

Synthesis of Fingerprint Images.

[BibT_eX]

[DOI]

Proceedings of the 16th International Conference on Pattern Recognition, 2002

David Navarro

Timeline

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On csauthors.net:

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