David May

According to our database, David May authored at least 6 papers between 2012 and 2016.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2016

Voltage over-scaling in sequential circuits for approximate computing.

David May, Walter Stechele

Proceedings of the 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, 2016

2015

Design of fine-grained sequential approximate circuits using probability-aware fault emulation.

David May, Walter Stechele

Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015

2014

Improving the significance of probabilistic circuit fault emulations.

David May, Walter Stechele

Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014

2013

A resource-efficient probabilistic fault simulator.

David May, Walter Stechele

Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

2012

An FPGA-based probability-aware fault simulator.

David May, Walter Stechele

Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

Hardware prototyping of novel invasive multicore architectures.

Jürgen Becker, Stephanie Friederich, Jan Heisswolf, Ralf König, David May

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012