David M. Binkley
Affiliations:- University of North Carolina at Charlotte, Department of Electrical and Computer Engineering, NC, USA
According to our database1,
David M. Binkley
authored at least 14 papers
between 1998 and 2012.
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Bibliography
2012
Using moderate inversion to optimize voltage gain, thermal noise, and settling time in two-stage CMOS amplifiers.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
2009
An experimental 0.6-V 57.5-fJ/conversion-step 250-kS/s 8-bit rail-to-rail successive approximation ADC in 0.18µm CMOS.
Proceedings of the 16th IEEE International Conference on Electronics, 2009
2008
Proceedings of the Design, Automation and Test in Europe, 2008
2006
J. Low Power Electron., 2006
2004
A 100-ps time-resolution CMOS time-to-digital converter for positron emission tomography imaging applications.
IEEE J. Solid State Circuits, 2004
2003
A CAD methodology for optimizing transistor current and sizing in analog CMOS design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003
2002
Re-interpreting the MOS transistor via the inversion coefficient and the continuum of g<sub>ms</sub>/I<sub>d</sub>.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002
2001
Re-Connecting MOS Modeling and Circuit Design: New Methods for Design Quality.
Proceedings of the 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 2001
2000
Design-oriented characterization of CMOS over the continuum of inversion level and channel length.
Proceedings of the 2000 7th IEEE International Conference on Electronics, 2000
Proceedings of the 37th Conference on Design Automation, 2000
1998
A micropower CMOS, direct-conversion, VLF receiver chip for magnetic-field wireless applications.
IEEE J. Solid State Circuits, 1998