David López Vilariño
Orcid: 0000-0002-4405-2924
According to our database1,
David López Vilariño
authored at least 46 papers
between 1995 and 2024.
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Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2024
Assessing Intel OneAPI capabilities and cloud-performance for heterogeneous computing.
J. Supercomput., June, 2024
IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens., 2024
2023
Comput. Aided Civ. Infrastructure Eng., September, 2023
J. Supercomput., June, 2023
2020
Automatic Extraction of Road Points from Airborne LiDAR Based on Bidirectional Skewness Balancing.
Remote. Sens., 2020
2019
Fast Ground Filtering of Airborne LiDAR Data Based on Iterative Scan-Line Spline Interpolation.
Remote. Sens., 2019
2018
A Developer-Friendly "Open Lidar Visualizer and Analyser" for Point Clouds With 3D Stereoscopic View.
IEEE Access, 2018
2017
2016
PRECISION: A Reconfigurable SIMD/MIMD Coprocessor for Computer Vision Systems-on-Chip.
IEEE Trans. Computers, 2016
2015
Proceedings of the 2015 International Conference on Embedded Computer Systems: Architectures, 2015
2012
Proceedings of the 2012 IEEE Computer Society Conference on Computer Vision and Pattern Recognition Workshops, 2012
SIMD/MIMD Dynamically-Reconfigurable Architecture for High-Performance Embedded Vision Systems.
Proceedings of the 23rd IEEE International Conference on Application-Specific Systems, 2012
2011
Performance analysis of massively parallel embedded hardware architectures for retinal image processing.
EURASIP J. Image Video Process., 2011
2009
EURASIP J. Adv. Signal Process., 2009
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009
2008
Int. J. Circuit Theory Appl., 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
CNN Implementation of Spin Filters for Electronic Speckle Pattern Interferometry Applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
On chip implementation of a pixel-parallel approach for retinal vessel tree extraction.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007
2006
Topographic cellular active contour techniques: theory, implementations and comparisons.
Int. J. Circuit Theory Appl., 2006
Int. J. Circuit Theory Appl., 2006
2005
Pixel-level snakes on the CNNUM: algorithm design, on-chip implementation and applications.
Int. J. Circuit Theory Appl., 2005
A one-quadrant discrete-time cellular neural network architecture for pixel-level snakes: B/W processing.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
A one-quadrant discrete-time cellular neural network CMOS chip for pixel-level snakes.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the Pattern Recognition and Image Analysis, 2005
2004
Implementation of a pixel-level snake algorithm on a CNNUM-based chip set architecture.
IEEE Trans. Circuits Syst. I Regul. Pap., 2004
Design of the processing core of a mixed-signal CMOS DTCNN chip for pixel-level snakes.
IEEE Trans. Circuits Syst. I Regul. Pap., 2004
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
A mixed-signal CMOS DTCNN chip for pixel-level snakes.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
2003
Image Vis. Comput., 2003
Proceedings of the Pattern Recognition and Image Analysis, First Iberian Conference, 2003
2002
Int. J. Circuit Theory Appl., 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
2000
Proceedings of the University as a Bridge from Technology to Society: IEEE International Symposium on Technology and Society, 2000
Design of multilayer discrete time cellular neural networks for image processing tasks based on genetic algorithms.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
Proceedings of the 15th International Conference on Pattern Recognition, 2000
1999
J. VLSI Signal Process., 1999
Genetic Algorithm Based Training for Multilayer Discrete-Time Cellular Neural Networks.
Proceedings of the Engineering Applications of Bio-Inspired Artificial Neural Networks, 1999
1998
Pattern Recognit. Lett., 1998
An analog CMOS realisation of a reconfigurable discrete-time cellular neural network.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
1997
Proceedings of the Biological and Artificial Computation: From Neuroscience to Technology, 1997
1995
Proceedings of the From Natural to Artificial Neural Computation, 1995