David Kearney

According to our database1, David Kearney authored at least 13 papers between 2006 and 2012.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2012
A shared secret security broker implementation in a commercial context.
Proceedings of the 7th International Conference for Internet Technology and Secured Transactions, 2012

2011
A Simple Deformable Model for Shark Recognition.
Proceedings of the Canadian Conference on Computer and Robot Vision, 2011

2009
An FPGA Implementation of a Parallelized MT19937 Uniform Random Number Generator.
EURASIP J. Embed. Syst., 2009

2008
Multiple parallel FPGA implementations of a Kolmogorov phase screen generator.
J. Real Time Image Process., 2008

2007
High Throughput Multi-port MT19937 Uniform Random Number Generator.
Proceedings of the Eighth International Conference on Parallel and Distributed Computing, 2007

Implementing a Phase Screen Generator in Hardware.
Proceedings of the Eighth International Conference on Parallel and Distributed Computing, 2007

A FPGA Implementation of Variable Kernel Convolution.
Proceedings of the Eighth International Conference on Parallel and Distributed Computing, 2007

A high throughput area time efficient pseudo uniform random number generator based on the TT800 algorithm.
Proceedings of the FPL 2007, 2007

Research Issues in Using Reconfigurable Computing to Accelerate Infrared Simulation.
Proceedings of the International Conference on Digital Image Computing: Techniques and Applications, 2007

A Parallel Area Efficient Kolmogorov Phase Screen Generator Suitable for FPGA Implementation.
Proceedings of the International Conference on Digital Image Computing: Techniques and Applications, 2007

2006
High Speed High Fidelity Infrared Scene Simulation Using Reconfigurable Computing.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

An Area Time Efficient Field Programmable Mersenne Twister Uniform Random Number Generator.
Proceedings of the 2006 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2006

A High Speed, Run Time Reconfigurable Image Acquisition processor for a Missile Approach Warning System.
Proceedings of the 2006 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2006


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