David J. Foley

According to our database, David J. Foley authored at least 3 papers between 2000 and 2002.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2002

A low-power 8-PAM serial transceiver in 0.5-μm digital CMOS.

David J. Foley, Michael P. Flynn

IEEE J. Solid State Circuits, 2002

2001

CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and temperature-compensated tunable oscillator.

David J. Foley, Michael P. Flynn

IEEE J. Solid State Circuits, 2001

2000

A 3.3 V, 1.6 GHz, low-jitter, self-correcting DLL based clock synthesizer in 0.5 μm CMOS.

David J. Foley, Michael P. Flynn

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000