David J. Allstot

IEEE Trans. Circuits Syst. I Regul. Pap., April, 2023

A Chopper-Stabilized Switched-Capacitor Front-End for Peripheral Nervous System Recording.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2023

A Digitally Configurable Outphasing Switched-Capacitor-Based RF Transmitter.

[BibT_eX]

[DOI]

Bo Qiao

Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

2022

Switched-Capacitor Circuits.

[BibT_eX]

[DOI]

Un-Ku Moon

Gabor C. Temes

Proceedings of the IEEE Custom Integrated Circuits Conference, 2022

2021

I/Q-Sharing Switched-Capacitor Power Amplifier with Baseband Harmonic-Rejection and Wilkinson Combiner.

[BibT_eX]

[DOI]

Bo Qiao

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Compressed Sensing Σ-Δ Modulators and Recovery Algorithm for Multi-Channel Bio-Signal Acquisition.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Linearity Improvement Techniques for CMOS Switched-Capacitor Power Amplifiers.

[BibT_eX]

[DOI]

Bo Qiao

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A Switched-Capacitor Closed-Loop Integration Sampling Front-End for Peripheral Nerve Recording.

[BibT_eX]

[DOI]

Proceedings of the IEEE Biomedical Circuits and Systems Conference, BioCAS 2021, 2021

2020

Windowed Integration Sampling in Bio-Signal Front-End Design.

[BibT_eX]

[DOI]

Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

10.7 A 0.26mm2 DPD-Less Quadrature Digital Transmitter With 30dB Pout Range in 65nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

Transformer-Combining Digital PA with Efficiency Peaking at 0, -6, and -12 dB Backoff in 32nm CMOS.

[BibT_eX]

[DOI]

Kailash Chandrashekar

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

gm/ID-Based Frequency Compensation of CMOS Two-Stage Operational Amplifiers.

[BibT_eX]

[DOI]

Chaiyanut Aueamnuay

Praveen Kumar Venkatachala

Narayana Bhagirath Thota

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

gm/ID Design Considerations for Subthreshold-Based CMOS Two-Stage Operational Amplifiers.

[BibT_eX]

[DOI]

Chaiyanut Aueamnuay

Narayana Bhagirath Thota

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019

Low-Voltage Tracking RC Frequency Compensation in Two-Stage Operational Amplifiers*.

[BibT_eX]

[DOI]

Yu-Wen Kuo

Pavan Kumar Ramakrishna

Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

A Two-Stage CMOS OTA with Load-Pole Cancellation.

[BibT_eX]

[DOI]

Pavan Kumar Ramakrishna

OnnLim Yong

Howard C. Yang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2017

Frequency-Channelized Mismatch-Shaped Quadrature Data Converters for Carrier Aggregation in MU-MIMO LTE-A.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2017

2015

DAC mismatch shaping for quadrature sigma-delta data converters.

[BibT_eX]

[DOI]

Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

2014

Compressed Sensing Analog Front-End for Bio-Sensor Applications.

[BibT_eX]

[DOI]

Jacques Christophe Rudell

IEEE J. Solid State Circuits, 2014

2013

A Class-G Switched-Capacitor RF Power Amplifier.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2013

2012

Multi-rate Polyphase DSP and LMS Calibration Schemes for Oversampled ADCs.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2012

Compressed Sensing System Considerations for ECG and EMG Wireless Biosensors.

[BibT_eX]

[DOI]

Anna M. R. Dixon

Emily G. Allstot

IEEE Trans. Biomed. Circuits Syst., 2012

A 0.8-2 GHz Fully-Integrated QPLL-Timed Direct-RF-Sampling Bandpass ΣΔ ADC in 0.13 µm CMOS.

[BibT_eX]

[DOI]

Subhanshu Gupta

Jacques Christophe Rudell

Hasnain Lakdawala

IEEE J. Solid State Circuits, 2012

Editorial.

[BibT_eX]

[DOI]

Riccardo Rovatti

Gianluca Setti

IEEE J. Emerg. Sel. Topics Circuits Syst., 2012

Digital power amplifier: A new way to exploit the switched-capacitor circuit.

[BibT_eX]

[DOI]

Sang-Min Yoo

IEEE Commun. Mag., 2012

A 1.1µW 2.1µVRMS input noise chopper-stabilized amplifier for bio-medical applications.

[BibT_eX]

[DOI]

Christopher J. Mandic

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011

A 2.4-GHz Extended-Range Type-I SigmaDelta Fractional-N Synthesizer With 1.8-MHz Loop Bandwidth and -110-dBc/Hz Phase Noise.

[BibT_eX]

[DOI]

Eum Chan Woo

IEEE Trans. Circuits Syst. II Express Briefs, 2011

A CMOS 1.6 GHz Dual-Loop PLL With Fourth-Harmonic Mixing.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2011

A Switched-Capacitor RF Power Amplifier.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2011

A switched-capacitor power amplifier for EER/polar transmitters.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

Compressive sampling of EMG bio-signals.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Analog Chirp Fourier Transform for high-resolution real-time wideband RF spectrum Analysis.

[BibT_eX]

[DOI]

Andrew Y. Chen

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Compressed sensing reconstruction: Comparative study with applications to ECG bio-signals.

[BibT_eX]

[DOI]

Anna M. R. Dixon

Emily G. Allstot

Andrew Y. Chen

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Multi-rate polyphase DSP and LMS calibration schemes for oversampled data conversion systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 2011

Towards greener wireless transmission: Efficient power amplifier design.

[BibT_eX]

[DOI]

Proceedings of the 2011 International Green Computing Conference and Workshops, 2011

2010

Linearizing CMOS Switching Power Amplifiers Using Supply Regulators.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2010

An 11.1 mW 42 MS/s 10 b ADC With Two-Step Settling in 0.18 μ m CMOS.

[BibT_eX]

[DOI]

Charles T. Peach

Un-Ku Moon

IEEE J. Solid State Circuits, 2010

A Current Reuse Quadrature GPS Receiver in 0.13 μ m CMOS.

[BibT_eX]

[DOI]

Kuang-Wei Cheng

Karthik Natarajan

IEEE J. Solid State Circuits, 2010

U-shaped slow-wave transmission lines in 0.18μm CMOS.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A Mode-I/Mode-III UWB LNA with programmable gain and 20 dB WLAN blocker rejection in 130nm CMOS.

[BibT_eX]

[DOI]

Subhanshu Gupta

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A 1.6 mW 5.4 GHz transformer-feedback gm-boosted current-reuse LNA in 0.18/μm CMOS.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009

A two-stage sensing technique for dynamic spectrum access.

[BibT_eX]

[DOI]

IEEE Trans. Wirel. Commun., 2009

Strong Injection Locking in Low- Q LC Oscillators: Modeling and Application in a Forwarded-Clock I/O Receiver.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2009

A Calibrated Phase and Amplitude Control System for a 1.9 GHz Phased-Array Transmitter Element.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2009

A Class-G Supply Modulator and Class-E PA in 130 nm CMOS.

[BibT_eX]

[DOI]

Stewart S. Taylor

IEEE J. Solid State Circuits, 2009

A Class-E PA With Pulse-Width and Pulse-Position Modulation in 65 nm CMOS.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2009

Integrated Quadrature Couplers and Their Application in Image-Reject Receivers.

[BibT_eX]

[DOI]

Dicle Ozis

IEEE J. Solid State Circuits, 2009

A 7.2mW quadrature GPS receiver in 0.13µm CMOS.

[BibT_eX]

[DOI]

Kuang-Wei Cheng

Karthik Natarajan

Proceedings of the IEEE International Solid-State Circuits Conference, 2009

Twisted Transformers for Low Coupling RF and Mixed Signal Applications.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008

Wideband CMOS Amplifier Design: Time-Domain Considerations.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2008

Cascaded Complex ADCs With Adaptive Digital Calibration for I/Q Mismatch.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2008

Desensitized CMOS Low-Noise Amplifiers.

[BibT_eX]

[DOI]

Gaurab Banerjee

IEEE Trans. Circuits Syst. I Regul. Pap., 2008

CMOS VCO and LNA Using Tuned-Input Tuned-Output Circuits.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2008

A 28.6dBm 65nm Class-E PA with Envelope Restoration by Pulse-Width and Pulse-Position Modulation.

[BibT_eX]

[DOI]

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

A 27Gb/s Forwarded-Clock I/O Receiver Using an Injection-Locked LC-DCO in 45nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

Hybrid modeling techniques for low OSR cascade continuous-time SigmaDelta modulators.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

A buffered charge pump with zero charge sharing.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Twisted inductors for low coupling mixed-signal and RF applications.

[BibT_eX]

[DOI]

Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007

Reflective-Type Phase Shifters for Multiple-Antenna Transceivers.

[BibT_eX]

[DOI]

Hossein Zarei

IEEE Trans. Circuits Syst. I Regul. Pap., 2007

Monolithic Spiral Transformers: A Design Methodology.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

A Digital-Summing Feedforward Sigma-Delta Modulator and its Application to a Cascade ADC.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

A Parallel, Multi-Resolution Sensing Technique for Multiple Antenna Cognitive Radios.

[BibT_eX]

[DOI]

Nathan M. Neihart

Sumit Roy

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006

A matrix amplifier in 0.18-μm SOI CMOS.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2006

Analysis of the Bridged T-Coil Circuit Using the Extra-Element Theorem.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2006

Parasitic-aware design and optimization of a CMOS RF power amplifier.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2006

A Calibrated Phase/Frequency Detector for Reference Spur Reduction in Charge-Pump PLLs.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2006

Substrate Noise Coupling in SoC Design: Modeling, Avoidance, and Validation.

[BibT_eX]

[DOI]

Proc. IEEE, 2006

Bandwidth Extension Techniques for CMOS Amplifiers.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2006

A fully-differential CMOS Clapp VCO for IEEE 802.11a applications.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Analysis and design of lumped-element quadrature couplers with lossy passive elements.

[BibT_eX]

[DOI]

Dicle Ozis

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A variable-offset phase detector for phased-array applications.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A 2-GHz CMOS variable gain amplifier optimized for low noise.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A 2-GHz integrated CMOS reflective-type phase shifter with 675° control range.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A delay generation technique for fast-locking frequency synthesizers.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005

Elitist nondominated sorting genetic algorithm based RF IC optimizer.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2005

A capacitor cross-coupled common-gate low-noise amplifier.

[BibT_eX]

[DOI]

Edgar Sánchez-Sinencio

IEEE Trans. Circuits Syst. II Express Briefs, 2005

A four-antenna receiver in 90-nm CMOS for beamforming and spatial diversity.

[BibT_eX]

[DOI]

Ralph Bishop

IEEE J. Solid State Circuits, 2005

Gm-boosted common-gate LNA and differential colpitts VCO/QVCO in 0.18-μm CMOS.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2005

Bridging Circuits and Electromagnetics in a Curriculum Aimed at Microelectronic Analog and Microwave Simulation and Design.

[BibT_eX]

[DOI]

Proceedings of the 2005 International Conference on Microelectronics Systems Education, 2005

A full-range all-pass variable phase shifter for multiple antenna receivers.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Design considerations for a 10 GHz CMOS transmit-receive switch.

[BibT_eX]

[DOI]

K. M. Naegle

Subhanshu Gupta

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A 360° extended range phase detector for type-I PLLs.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Architectural issues in base-station frequency synthesizers.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A 9-b 400 Msample/s pipelined analog-to digital converter in 90nm CMOS.

[BibT_eX]

[DOI]

Charles T. Peach

Ashoke Ravi

Rosie Bishop

Proceedings of the 31st European Solid-State Circuits Conference, 2005

Phase-locked loop synthesis using hierarchical divide-and-conquer multi-optimization.

[BibT_eX]

[DOI]

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

An elitist distributed particle swarm algorithm for RF IC optimization.

[BibT_eX]

[DOI]

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004

Digital calibration for monotonic pipelined A/D converters.

[BibT_eX]

[DOI]

IEEE Trans. Instrum. Meas., 2004

Parasitic-aware RF circuit design and optimization.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2004

Compact model generation for on-chip transmission lines.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2004

A quad-band GSM-GPRS transmitter with digital auto-calibration.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2004

A 12.5 GHz RF matrix amplifier in 180nm SOI CMOS.

[BibT_eX]

[DOI]

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

RF circuit synthesis using particle swarm optimization.

[BibT_eX]

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A tunable transmission line phase shifter (TTPS).

[BibT_eX]

[DOI]

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Post-optimization design centering for RF integrated circuits.

[BibT_eX]

[DOI]

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A lateral-BJT-biased CMOS voltage-controlled oscillator.

[BibT_eX]

[DOI]

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Design considerations for anti-phase injected quadrature voltage controlled oscillators.

[BibT_eX]

[DOI]

Tarun Kanti Bhattacharyya

Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004

A 6 GHz low-noise quadrature Colpitts VCO.

[BibT_eX]

[DOI]

Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004

Desensitized design of MOS low noise amplifiers by Rn minimization.

[BibT_eX]

[DOI]

Gaurab Banerjee

David T. Becher

Celia Hung

Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004

Measurement and modeling of noise parameters for desensitized low noise amplifiers.

[BibT_eX]

[DOI]

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

NSGA-based parasitic-aware optimization of a 5GHz low-noise VCO.

[BibT_eX]

[DOI]

Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

2003

A resonant pad for ESD protected narrowband CMOS RF applications.

[BibT_eX]

[DOI]

J. Shorb

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A monotonic digital calibration technique for pipelined data converters.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

On-chip inductor structures: a comparative study.

[BibT_eX]

[DOI]

Srinivas Kodali

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A symmetric miniature 3D inductor.

[BibT_eX]

[DOI]

Srinivas Kodali

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Accurate compact model extraction for on-chip coplanar waveguides.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A mixed-signal calibration technique for low-voltage CMOS 1.5-bit/stage pipeline data converters.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

An 8-bit, 1.8 V, 20 MSample/s analog-to-digital converter using low gain opamps.

[BibT_eX]

[DOI]

D. R. Beck

D. Garrity

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Parasitic-aware design and optimization of a fully integrated CMOS wideband amplifier.

[BibT_eX]

[DOI]

Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

2002

A 0.5-8.5 GHz fully differential CMOS distributed amplifier.

[BibT_eX]

[DOI]

Hee-Tae Ahn

IEEE J. Solid State Circuits, 2002

Class AB-D-G line driver for central office asymmetric digital subscriber line systems.

[BibT_eX]

[DOI]

J. Shorb

R. Roze

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Matching considerations in I/Q A/D converter pairs.

[BibT_eX]

[DOI]

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

A 2 GHz CMOS even harmonic mixer for direct conversion receivers.

[BibT_eX]

[DOI]

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Parasitic-aware synthesis of RF CMOS switching power amplifiers.

[BibT_eX]

[DOI]

Sayfe Kiaei

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2001

Design and optimization of CMOS RF power amplifiers.

[BibT_eX]

[DOI]

Brian M. Ballweber

IEEE J. Solid State Circuits, 2001

2000

Correction to "A fully integrated 0.5 - 5.5-GHz CMOS distributed amplifier".

[BibT_eX]

[DOI]

Brian M. Ballweber

IEEE J. Solid State Circuits, 2000

A fully integrated 0.5-5.5 GHz CMOS distributed amplifier.

[BibT_eX]

[DOI]

Brian M. Ballweber

IEEE J. Solid State Circuits, 2000

A low-jitter 1.9-V CMOS PLL for UltraSPARC microprocessor applications.

[BibT_eX]

[DOI]

Hee-Tae Ahn

IEEE J. Solid State Circuits, 2000

1999

Addition to "Monolithic transformers and their application in a differential CMOS RF low-noise amplifier".

[BibT_eX]

[DOI]

Jianjun Zhou

IEEE J. Solid State Circuits, 1999

A multistage amplifier technique with embedded frequency compensation.

[BibT_eX]

[DOI]

Hiok-Tiaq Ng

Ramsin M. Ziazadeh

IEEE J. Solid State Circuits, 1999

Fully monolithic CMOS RF power amplifiers: recent advances.

[BibT_eX]

[DOI]

IEEE Commun. Mag., 1999

1998

Noise considerations for mixed-signal RF IC transceivers.

[BibT_eX]

[DOI]

Wirel. Networks, 1998

Monolithic transformers and their application in a differential CMOS RF low-noise amplifier.

[BibT_eX]

[DOI]

Jianjun Zhou

IEEE J. Solid State Circuits, 1998

Computer-aided design considerations for mixed-signal coupling in RF integrated circuits.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 1998

A multistage amplifier topology with embedded tracking compensation.

[BibT_eX]

[DOI]

Ramsin M. Ziazadeh

Hiok-Tiaq Ng

Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998

1997

CMOS current steering logic for low-voltage mixed-signal integrated circuits.

[BibT_eX]

[DOI]

Hiok-Tiaq Ng

IEEE Trans. Very Large Scale Integr. Syst., 1997

A low-power backward equalizer for DFE read-channel applications.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 1997

Charge-pump assisted low-power/low-voltage CMOS opamp design.

[BibT_eX]

[DOI]

Proceedings of the 1997 International Symposium on Low Power Electronics and Design, 1997

1996

Low-power CMOS continuous-time filters.

[BibT_eX]

[DOI]

Rajesh H. Zele

IEEE J. Solid State Circuits, 1996

Verification techniques for substrate coupling and their application to mixed-signal IC design.

[BibT_eX]

[DOI]

Mark A. Wolfe

IEEE J. Solid State Circuits, 1996

CMOS folding A/D converters with current-mode interpolation.

[BibT_eX]

[DOI]

Michael P. Flynn

IEEE J. Solid State Circuits, 1996

1995

An 85 mW, 10 b, 40 Msample/s CMOS parallel-pipelined ADC.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, March, 1995

Substrate-aware mixed-signal macrocell placement in WRIGHT.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, March, 1995

A Macromodel Compaction Scheme for the Fast Stimulation of Large Linear Mesh Circuits.

[BibT_eX]

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

High-Speed CMOS Current-Mode Equalizers.

[BibT_eX]

[DOI]

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

Low-Power High-Speed Continuous-Time Sigma-Delta Modulators.

[BibT_eX]

[DOI]

Rohit Mittal

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

SUBTRACT: a program for the efficient evaluation of substrate parasitics in integrated circuits.

[BibT_eX]

[DOI]

Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

1994

Low-voltage fully differential switched-current filters.

[BibT_eX]

[DOI]

Rajesh H. Zele

IEEE J. Solid State Circuits, March, 1994

Addressing substrate coupling in mixed-mode ICs: simulation and power distribution synthesis.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, March, 1994

Forum: From 100 Milliwatts/MIPS to 10 Microwatts/MIPS.

[BibT_eX]

[DOI]

Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1993

A 3V-125 MHz CMOS Continuous-time Filter.

[BibT_eX]

Rajesh H. Zele

Sang-Soo Lee

Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

A unified approach to simulating electrical and thermal substrate coupling interactions in ICs.

[BibT_eX]

[DOI]

Sang-Soo Lee

Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

1990

CMOS switched-current ladder filters.

[BibT_eX]

[DOI]

Terri S. Fiez

IEEE J. Solid State Circuits, December, 1990

A p-well GaAs MESFET technology for mixed-mode applications.

[BibT_eX]

[DOI]

Philip C. Canfield

IEEE J. Solid State Circuits, December, 1990

Modeling of frequency and temperature effects in GaAs MESFETs.

[BibT_eX]

[DOI]

Philip C. Canfield

Steven C. F. Lam