David Iezzi
According to our database1,
David Iezzi
authored at least 3 papers
between 2003 and 2004.
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Bibliography
2004
Building the Hierarchy from a Flat Netlist for a Fast and Accurate Post-Layout Simulation with Parasitic Components.
Proceedings of the 2004 Design, 2004
2003
IEEE J. Solid State Circuits, 2003
A reconfigurable signal processing IC with embedded FPGA and multi-port flash memory.
Proceedings of the 40th Design Automation Conference, 2003