David F. Heidel

According to our database, David F. Heidel authored at least 15 papers between 1998 and 2008.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of three.

2008

New simulation methodology for effects of radiation in semiconductor chip structures.

Henry H. K. Tang, Conal E. Murray, Giovanni Fiorenza, Kenneth P. Rodbell, Michael S. Gordon, David F. Heidel

IBM J. Res. Dev., 2008

Alpha-particle-induced upsets in advanced CMOS circuits and technology.

David F. Heidel, Kenneth P. Rodbell, Ethan H. Cannon, Cyril Cabral Jr., Michael S. Gordon, Phil Oldiges, Henry H. K. Tang

IBM J. Res. Dev., 2008

Preface.

David F. Heidel, Jack Hergenrother, Kenneth P. Rodbell

IBM J. Res. Dev., 2008

Single-event-upset and alpha-particle emission rate measurement techniques.

Michael S. Gordon, Kenneth P. Rodbell, David F. Heidel, Cyril Cabral Jr., Ethan H. Cannon, Daniel D. Reinhardt

IBM J. Res. Dev., 2008

2006

A pulsed low-voltage swing latch for reduced power dissipation in high-frequency microprocessors.

Pong-Fei Lu, Nianzheng Cao, Leon J. Sigal, Pieter Woltgens, Raphael Robertazzi, David F. Heidel

Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006

Single-Event-Upset Trends in Advanced CMOS Technologies.

David F. Heidel

Proceedings of the 21th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2006), 2006

2005

An on-chip jitter measurement circuit with sub-picosecond resolution.

Keith A. Jenkins, Anup P. Jose, David F. Heidel

Proceedings of the 31st European Solid-State Circuits Conference, 2005

2003

Minimizing inductive noise in system-on-a-chip with multiple power gating structures.

Suhwan Kim, Stephen V. Kosonocky, Daniel R. Knebel, Kevin Stawiasz, David F. Heidel, Michael Immediato

Proceedings of the ESSCIRC 2003, 2003

2002

An overview of the BlueGene/L Supercomputer.

Narasimha R. Adiga, George Almási, George S. Almási, Yariv Aridor, Rajkishore Barik, Daniel K. Beece, Ralph Bellofatto, Gyan Bhanot, Randy Bickford, Matthias A. Blumrich, Arthur A. Bright, José R. Brunheroto, Calin Cascaval, José G. Castaños, Waiman Chan, Luis Ceze, Paul Coteus, Siddhartha Chatterjee, Dong Chen, George L.-T. Chiu, Thomas M. Cipolla, Paul Crumley, K. M. Desai, Alina Deutsch, Tamar Domany, Marc Boris Dombrowa, Wilm E. Donath, Maria Eleftheriou, C. Christopher Erway, J. Esch, Blake G. Fitch, Joseph Gagliano, Alan Gara, Rahul Garg, Robert S. Germain, Mark Giampapa, Balaji Gopalsamy, John A. Gunnels, Manish Gupta, Fred G. Gustavson, Shawn Hall, Ruud A. Haring, David F. Heidel, Philip Heidelberger, Lorraine Herger, Dirk Hoenicke, R. D. Jackson, T. Jamal-Eddine, Gerard V. Kopcsay, Elie Krevat, Manish P. Kurhekar, Alphonso P. Lanzetta, Derek Lieber, L. K. Liu, M. Lu, Mark P. Mendell, A. Misra, Yosef Moatti, Lawrence S. Mok, José E. Moreira, Ben J. Nathanson, Matthew Newton, Martin Ohmacht, Adam J. Oliner, Vinayaka Pandit, R. B. Pudota, Rick A. Rand, Richard D. Regan, Bradley Rubin, Albert E. Ruehli, Silvius Vasile Rus, Ramendra K. Sahoo, Alda Sanomiya, Eugen Schenfeld, M. Sharma, Edi Shmueli, Sarabjeet Singh, Peilin Song, Vijay Srinivasan, Burkhard D. Steinmacher-Burow, Karin Strauss, Christopher W. Surovic, Richard A. Swetz, Todd Takken, R. Brett Tremaine, Mickey Tsao, Arun R. Umamaheshwaran, P. Verma, Pavlos Vranas, T. J. Christopher Ward, Michael E. Wazlowski, W. Barrett, C. Engel, B. Drehmel, B. Hilgart, D. Hill, F. Kasemkhani, David J. Krolak, Chun-Tao Li, Thomas A. Liebsch, James A. Marcella, A. Muff, A. Okomo, M. Rouse, A. Schram, M. Tubbs, G. Ulsh, Charles D. Wait, J. Wittrup, Myung Bae, Kenneth A. Dockser, Lynn Kissel, Mark K. Seager, Jeffrey S. Vetter, K. Yates

Proceedings of the 2002 ACM/IEEE conference on Supercomputing, 2002

Blue Gene/L, a System-On-A-Chip.

George S. Almási, Daniel K. Beece, Ralph Bellofatto, Gyan Bhanot, Randy Bickford, Matthias A. Blumrich, Arthur A. Bright, José R. Brunheroto, Calin Cascaval, José G. Castaños, Luis Ceze, Paul Coteus, Siddhartha Chatterjee, Dong Chen, George L.-T. Chiu, Thomas M. Cipolla, Paul Crumley, Alina Deutsch, Marc Boris Dombrowa, Wilm E. Donath, Maria Eleftheriou, Blake G. Fitch, Joseph Gagliano, Alan Gara, Robert S. Germain, Mark Giampapa, Manish Gupta, Fred G. Gustavson, Shawn Hall, Ruud A. Haring, David F. Heidel, Philip Heidelberger, Lorraine Herger, Dirk Hoenicke, T. Jamal-Eddine, Gerard V. Kopcsay, Alphonso P. Lanzetta, Derek Lieber, M. Lu, Mark P. Mendell, Lawrence S. Mok, José E. Moreira, Ben J. Nathanson, Matthew Newton, Martin Ohmacht, Rick A. Rand, Richard D. Regan, Ramendra K. Sahoo, Alda Sanomiya, Eugen Schenfeld, Sarabjeet Singh, Peilin Song, Burkhard D. Steinmacher-Burow, Karin Strauss, Richard A. Swetz, Todd Takken, R. Brett Tremaine, Mickey Tsao, Pavlos Vranas, T. J. Christopher Ward, Michael E. Wazlowski, J. Brown, Thomas A. Liebsch, A. Schram, G. Ulsh

Proceedings of the 2002 IEEE International Conference on Cluster Computing (CLUSTER 2002), 2002

1999

Implementation of a self-resetting CMOS 64-bit parallel adder with enhanced testability.

Wei Hwang, George Diedrich Gristede, Pia N. Sanda, Shao Y. Wang, David F. Heidel

IEEE J. Solid State Circuits, 1999

1998

A 1.0-GHz single-issue 64-bit powerPC integer processor.

Joel Silberman, Naoaki Aoki, David Boerstler, Jeffrey L. Burns, Sang H. Dhong, Axel Essbaum, Uttam Ghoshal, David F. Heidel, H. Peter Hofstee, Kyung T. Lee, David Meltzer, Hung C. Ngo, Kevin J. Nowka, Stephen D. Posluszny, Osamu Takahashi, Ivan Vo, Brian A. Zoric

IEEE J. Solid State Circuits, 1998

Designing a Testable System on a Chip.

Stephen V. Kosonocky, Arthur A. Bright, Kevin W. Warren, Ruud A. Haring, Steve Klepner, Sameh W. Asaad, S. Basavaiah, Bob Havreluk, David F. Heidel, Michael Immediato, Keith A. Jenkins, Rajiv V. Joshi, Benjamin D. Parker, T. V. Rajeevakumar, Kevin Stawiasz

Proceedings of the 16th IEEE VLSI Test Symposium (VTS '98), 28 April, 1998

High-Speed Serializing/De-Serializing Design-For-Test Method for Evaluating a 1 GHz Microprocessor.

David F. Heidel, Sang H. Dhong, H. Peter Hofstee, Michael Immediato, Kevin J. Nowka, Joel Silberman, Kevin Stawiasz

Proceedings of the 16th IEEE VLSI Test Symposium (VTS '98), 28 April, 1998

Design and implementation of high performance dynamic 64-bit parallel adder with enhanced testability.

Wei Hwang, George Diedrich Gristede, Pia N. Sanda, Shao Y. Wang, David F. Heidel

Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998