David Defour

Orcid: 0000-0001-9923-2394

According to our database1, David Defour authored at least 41 papers between 2003 and 2023.

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Bibliography

2023
Chromatic Analysis of Numerical Programs.
Proceedings of the 30th IEEE Symposium on Computer Arithmetic, 2023

2022
Using scheduling entropy amplification in CUDA/OpenMP code to exhibit non-reproducibility issues.
Proceedings of the 15th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2022

2021
A Study of the Effects and Benefits of Custom-Precision Mathematical Libraries for HPC Codes.
IEEE Trans. Emerg. Top. Comput., 2021

Shadow computation with BFloat16 to estimate the numerical accuracy of summations.
Proceedings of the 28th IEEE Symposium on Computer Arithmetic, 2021

2020
Custom-Precision Mathematical Library Explorations for Code Profiling and Optimization.
Proceedings of the 27th IEEE Symposium on Computer Arithmetic, 2020

2019
Hierarchical approach for deriving a reproducible unblocked LU factorization.
Int. J. High Perform. Comput. Appl., 2019

Automatic Exploration of Reduced Floating-Point Representations in Iterative Methods.
Proceedings of the Euro-Par 2019: Parallel Processing, 2019

2018
FP-ANR: A representation format to handle floating-point cancellation at run-time.
Proceedings of the 25th IEEE Symposium on Computer Arithmetic, 2018

VeriTracer: Context-enriched tracer for floating-point arithmetic analysis.
Proceedings of the 25th IEEE Symposium on Computer Arithmetic, 2018

2017
An Efficient Representation Format for Fuzzy Intervals Based on Symmetric Membership Functions.
ACM Trans. Math. Softw., 2017

Exact Lookup Tables for the Evaluation of Trigonometric and Hyperbolic Functions.
IEEE Trans. Computers, 2017

Asynchronous Power Flow on Graphic Processing Units.
Proceedings of the 25th Euromicro International Conference on Parallel, 2017

2016
A software scheduling solution to avoid corrupted units on GPUs.
J. Parallel Distributed Comput., 2016

2015
Numerical reproducibility for the parallel reduction on multi- and many-core architectures.
Parallel Comput., 2015

Measuring Predictability of Nvidia's GPU Schedulers: Application to the Summation Problem.
Proceedings of the IEEE 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2015

Reproducible Triangular Solvers for High-Performance Computing.
Proceedings of the 12th International Conference on Information Technology, 2015

Reproducible floating-point atomic addition in data-parallel environment.
Proceedings of the 2015 Federated Conference on Computer Science and Information Systems, 2015

Range reduction based on Pythagorean triples for trigonometric function evaluation.
Proceedings of the 26th IEEE International Conference on Application-specific Systems, 2015

2014
A Fast Chaos-Based Pseudo-Random Bit Generator Using Binary64 Floating-Point Arithmetic.
Informatica (Slovenia), 2014

A Pseudo-Random Bit Generator Based on Three Chaotic Logistic Maps and IEEE 754-2008 Floating-Point Arithmetic.
Proceedings of the Theory and Applications of Models of Computation, 2014

Reproducible and Accurate Matrix Multiplication.
Proceedings of the Scientific Computing, Computer Arithmetic, and Validated Numerics, 2014

FuzzyGPU: A Fuzzy Arithmetic Library for GPU.
Proceedings of the 22nd Euromicro International Conference on Parallel, 2014

Contribution au calcul sur GPU: considérations arithmétiques et architecturales.
, 2014

2013
GPUburn: A system to test and mitigate GPU hardware failures.
Proceedings of the 2013 International Conference on Embedded Computer Systems: Architectures, 2013

Regularity Versus Load-Balancing on GPU for Treefix Computations.
Proceedings of the International Conference on Computational Science, 2013

2010
Barra: A Parallel Functional Simulator for GPGPU.
Proceedings of the MASCOTS 2010, 2010

Implementing LNS using filtering units of GPUs.
Proceedings of the IEEE International Conference on Acoustics, 2010

2009
Power Consumption of GPUs from a Software Perspective.
Proceedings of the Computational Science, 2009

Using Graphics Processors for Parallelizing Hash-Based Data Carving.
Proceedings of the 42st Hawaii International International Conference on Systems Science (HICSS-42 2009), 2009

Dynamic Detection of Uniform and Affine Vectors in GPGPU Computations.
Proceedings of the Euro-Par 2009, 2009

2008
État de l'intégration de la virgule flottante dans les processeurs graphiques.
Tech. Sci. Informatiques, 2008

Line-by-line spectroscopic simulations on graphics processing units.
Comput. Phys. Commun., 2008

2007
Graphic processors to speed-up simulations for the design of high performance solar receptors.
Proceedings of the IEEE International Conference on Application-Specific Systems, 2007

2006
Ordonnancement distribué d'instructions.
Tech. Sci. Informatiques, 2006

Caractéristiques arithmétiques des processeurs graphiques
CoRR, 2006

Implementation of float-float operators on graphics hardware
CoRR, 2006

2005
A New Range-Reduction Algorithm.
IEEE Trans. Computers, 2005

The instruction register file micro-architecture.
Future Gener. Comput. Syst., 2005

2004
Proposal for a Standardization of Mathematical Function Implementation in Floating-Point Arithmetic.
Numer. Algorithms, 2004

2003
Fonctions élémentaires : algorithmes et implémentations efficaces pour l'arrondi correct en double précision. (Elementary functions : algorithms and efficient implementation for correct rounding for the double precision).
PhD thesis, 2003

Software Carry-Save: A Case Study for Instruction-Level Parallelism.
Proceedings of the Parallel Computing Technologies, 2003


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