David Chih-Wei Chang

According to our database, David Chih-Wei Chang authored at least 5 papers between 1993 and 2011.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2011

Parallel Architecture Core (PAC) - the First Multicore Application Processor SoC in Taiwan Part I: Hardware Architecture & Software Development Tools.

David Chih-Wei Chang, Tay-Jyi Lin, Chung-Ju Wu, Jenq Kuen Lee, Yuan-Hua Chu, An-Yeu Wu

J. Signal Process. Syst., 2011

2006

PAC DSP Core and Application Processors.

David Chih-Wei Chang, I-Tao Liao, Jenq Kuen Lee, Wen-Feng Chen, Shau-Yin Tseng, Chein-Wei Jen

Proceedings of the 2006 IEEE International Conference on Multimedia and Expo, 2006

1995

Fault-Tolerant Features in the HaL Memory Management Unit.

Nirmal R. Saxena, David Chih-Wei Chang, Kevin Dawallu, Jaspal Kohli, Pat Helland

IEEE Trans. Computers, 1995

Microarchitecture of HaL's Memory Management Unit.

David Chih-Wei Chang, David Lyon, Charles Chen, Leon Peng, Mehran Massoumi, Matthew Hakimi, Satish Iyengar, Ellen Li, Roque Remedios

Proceedings of the COMPCON '95: Technologies for the Information Superhighway, 1995

1993

Concurrent Error Detection/Correction in the HAL MMU Chip.

David Chih-Wei Chang, Nirmal R. Saxena

Proceedings of the Digest of Papers: FTCS-23, 1993