David Blankenbeckler
According to our database1,
David Blankenbeckler
authored at least 3 papers
between 2014 and 2016.
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Bibliography
2016
Architecture of a Reusable BIST Engine for Detection and Autocorrection of Memory Failures and for IO Debug, Validation, Link Training, and Power Optimization on 14-nm SoC.
IEEE Des. Test, 2016
2015
Platform IO and system memory test using L3 cache based test (CBT) and parallel execution of CPGC Intel BIST engine.
Proceedings of the 2015 IEEE International Test Conference, 2015
2014
A reusable BIST with software assisted repair technology for improved memory and IO debug, validation and test time.
Proceedings of the 2014 International Test Conference, 2014