David B. G. Edwards

According to our database1, David B. G. Edwards authored at least 9 papers between 1961 and 1981.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

1981
A chip-set for a high-speed low-cost floating-point unit.
Proceedings of the 5th IEEE Symposium on Computer Arithmetic, 1981

1980
MU6-G: A New Design to Achieve Mainframe Performance from a Mini-Sized Computer.
Proceedings of the 7th Annual Symposium on Computer Architecture, 1980

1977
The MU5 Multicomputer Communication System.
IEEE Trans. Computers, 1977

1971
Computer structures: past, present and future (abstract).
Proceedings of the American Federation of Information Processing Societies: Proceedings of the AFIPS '71 Fall Joint Computer Conference, 1971

1968
An operating system for a small computer providing time-shard data collection, computing and control functions.
Proceedings of the Information Processing, Proceedings of IFIP Congress 1968, Edinburgh, UK, 5-10 August 1968, Volume 1, 1968

Associative memories in large computer systems <i>and</i> An integrated associateve memory matrix.
Proceedings of the Information Processing, Proceedings of IFIP Congress 1968, Edinburgh, UK, 5-10 August 1968, Volume 2, 1968

1966
Addressing Magnetic Tape on the Atlas 1 Computing Machine.
Comput. J., 1966

1962
One-Level Storage System.
IRE Trans. Electron. Comput., 1962

1961
High-Speed Transistorized Adders.
IRE Trans. Electron. Comput., 1961


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