David A. Johns

Orcid: 0000-0001-8198-9890

Affiliations:
  • University of Toronto, ON, Canada


According to our database1, David A. Johns authored at least 57 papers between 1993 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Online presence:

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Bibliography

2020
A Normalized Figure of Merit for Capacitive Accelerometer Interface Circuits.
IEEE Trans. Circuits Syst. II Express Briefs, 2020

2019
A Third-Order Integrated Passive Switched-Capacitor Filter Obtained With a Continuous-Time Design Approach.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

2018
A low-power sub-GHz RF receiver front-end with enhanced blocker tolerance.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018

2016
A Simplified Model for Passive-Switched-Capacitor Filters With Complex Poles.
IEEE Trans. Circuits Syst. II Express Briefs, 2016

2015
A Flexible Charge-Balanced Ratiometric Open-Loop Readout System for Capacitive Inertial Sensors.
IEEE Trans. Circuits Syst. II Express Briefs, 2015

A pseudo-differential charge balanced ratiometric readout system for capacitive inertial sensors.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

An open source inertial sensor network with Bluetooth Smart.
Proceedings of the IEEE 28th Canadian Conference on Electrical and Computer Engineering, 2015

2013
A Low-Power Delta-Sigma Modulator Using a Charge-Pump Integrator.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013

2012
Charge-pump based switched-capacitor gain stage.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

2010
Incremental Data Converters at Low Oversampling Ratios.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010

A Low-Power Capacitive Charge Pump Based Pipelined ADC.
IEEE J. Solid State Circuits, 2010

A frequency-scalable 15-bit incremental ADC for low power sensor applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
A 12-bit 3.125 MHz Bandwidth 0-3 MASH Delta-Sigma Modulator.
IEEE J. Solid State Circuits, 2009

A 50MS/s 9.9mW pipelined ADC with 58dB SNDR in 0.18µm CMOS using capacitive charge-pumps.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

An 8th-order MASH delta-sigma with an OSR of 3.
Proceedings of the 35th European Solid-State Circuits Conference, 2009

2008
A Robust 4-PAM Signaling Scheme for Inter-Chip Links Using Coding in Space.
IEEE Trans. Very Large Scale Integr. Syst., 2008

Combining Multipath and Single-Path Time-Interleaved Delta-Sigma Modulators.
IEEE Trans. Circuits Syst. II Express Briefs, 2008

A High Bandwidth Power Scalable Sub-Sampling 10-Bit Pipelined ADC With Embedded Sample and Hold.
IEEE J. Solid State Circuits, 2008

An 11-Bit 45 MS/s Pipelined ADC With Rapid Calibration of DAC Errors in a Multibit Pipeline Stage.
IEEE J. Solid State Circuits, 2008

A 14 - bit micro-watt power scalable automotive MEMS pressure sensor interface.
Proceedings of the ESSCIRC 2008, 2008

2007
A high bandwidth power scaleable sub-sampling 10-bit pipelined ADC with embedded sample and hold.
Proceedings of the 33rd European Solid-State Circuits Conference, 2007

An 11-bit 45MS/s pipelined ADC with rapid calibration of DAC errors in a multi-bit pipeline stage.
Proceedings of the 33rd European Solid-State Circuits Conference, 2007

2006
Coding schemes for chip-to-chip interconnect applications.
IEEE Trans. Very Large Scale Integr. Syst., 2006

On the implementation of input-feedforward delta-sigma modulators.
IEEE Trans. Circuits Syst. II Express Briefs, 2006

A time-interleaved continuous-time ΔΣ modulator with 20-MHz signal bandwidth.
IEEE J. Solid State Circuits, 2006

2005
A 50-MS/s (35 mW) to 1-kS/s (15 μW) power scaleable 10-bit pipelined ADC using rapid power-on opamps and minimal bias current variation.
IEEE J. Solid State Circuits, 2005

A time-interleaved continuous-time ΔΣ modulator with 20MHz signal bandwidth.
Proceedings of the 31st European Solid-State Circuits Conference, 2005

2004
A CMOS 10-gb/s power-efficient 4-PAM transmitter.
IEEE J. Solid State Circuits, 2004

A low-power crosstalk-insensitive signaling scheme for chip-to-chip communication.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A power-efficient 4-PAM signaling scheme with convolutional encoder in space for chip-to-chip communication.
Proceedings of the 33rd European Solid-State Circuits Conference, 2004

2003
Digital LMS adaptation of analog filters without gradient information.
IEEE Trans. Circuits Syst. II Express Briefs, 2003

A low-complexity power-efficient signaling scheme for chip-to-chip communication.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A power-efficient architecture for high-speed D/A converters.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A 400-MHz 6-bit ADC with a partial analog equalizer for coaxial cable channels.
Proceedings of the ESSCIRC 2003, 2003

2002
High-speed CMOS analog Viterbi detector for 4-PAM partial-response signaling.
IEEE J. Solid State Circuits, 2002

A 5th order Gm-C filter in 0.25 µm CMOS with digitally programmable poles and zeroes.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Analog filter adaptation using a dithered linear search algorithm.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2001
A transimpedance amplifier with DC-coupled differential photodiode current sensing for wireless optical communications.
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001

2000
A differential 160-MHz self-terminating adaptive CMOS line driver.
IEEE J. Solid State Circuits, 2000

ADC resolution enhancement by an analog decorrelator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999
Transimpedance amplifier with differential photodiode current sensing.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

A multilevel modulation scheme for high-speed wireless infrared communications.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Obtaining digital gradient signals for analog adaptive filters.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

1998
An integrated 200-MHz 3.3-V BiCMOS class-IV partial-response analog Viterbi decoder.
IEEE J. Solid State Circuits, 1998

Stable one-bit delta-sigma modulators based on switching control.
Proceedings of the 1998 IEEE International Conference on Acoustics, 1998

1997
Integrated circuits for data transmission over twisted-pair channels.
IEEE J. Solid State Circuits, 1997

1995
A 100 Mb/s BiCMOS Adaptive Pulse-Shaping Filter.
IEEE J. Sel. Areas Commun., 1995

An Approach for Tuning High-Q Continuous-Time Bandpass Filters.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

1994
DC Offset Performance of Four LMS Adaptive Algorithms.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

Analog Implementation of Class-IV Partial-Response Viterbi Detector.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

Adaptive Impedance Matching.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

Mismatch Effects in Time-Interleaved Oversampling Converters.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1993
Equalization and linearization via linear negative feedback.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

A High-Quality Analog Oscillator Using Oversampling D/A Conversion Techniques.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

On the Effect of Comparator Hysteresis in Interpolative Delta Sigma Modulators.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

Highly Selective "Analog" Filters Using Delta Sigma Based IIR Filtering.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

Adaptive IIR filtering of delta-sigma modulated signals.
Proceedings of the IEEE International Conference on Acoustics, 1993


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