Darshika G. Perera

According to our database, Darshika G. Perera authored at least 37 papers between 2007 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Wavelet Based Frequency Detection Using FPGAs.

Caleb Hill, Darshika G. Perera

CoRR, 2024

Analysis of Generalized Hebbian Learning Algorithm for Neuromorphic Hardware Using Spinnaker.

Shivani Sharma, Darshika G. Perera

CoRR, 2024

Composing Efficient Computational Models for Real-Time Processing on Next-Generation Edge-Computing Platforms.

Mokhles A. Mohsin, S. Navid Shahrouzi, Darshika G. Perera

IEEE Access, 2024

Discrepancy in Execution Time: Static vs. Dynamic Reconfigurable Hardware.

Darshika G. Perera, Kin F. Li

Proceedings of the IEEE Pacific Rim Conference on Communications, 2024

HDL Code Variation: Impact on FPGA Performance Metrics and CAD Tools.

Ian D. Atwell, Darshika G. Perera

Proceedings of the IEEE Pacific Rim Conference on Communications, 2024

2023

An Effective Content Based Image Retrieval System Using Deep Learning Based Inception Model.

E. Ranjith, Latha Parthiban, Thamarai Pugazhendhi Latchoumi, Ananda Kumar Subramanian, Darshika G. Perera, Sangeetha Ramaswamy

Wirel. Pers. Commun., November, 2023

Land Cover Classification Using Landsat 7 Data for Land Sustainability.

K. Lavanya, Abhilasha Gondchar, Irene Maria Mathew, Sumitkumar Sarda, Ananda Kumar Subramanian, Anand Mahendran, Darshika G. Perera

Wirel. Pers. Commun., September, 2023

Neuromorphic Sentiment Analysis Using Spiking Neural Networks.

Raghavendra Kumar Chunduri, Darshika G. Perera

Sensors, September, 2023

Toward Composing Efficient FPGA-Based Hardware Accelerators for Physics-Based Model Predictive Control Smart Sensor for HEV Battery Cell Management.

Anne K. Madsen, Darshika G. Perera

IEEE Access, 2023

A Systolic Array Architecture for SVM Classifier for Machine Learning on Embedded Devices.

Srikanth Ramadurgam, Darshika G. Perera

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

Optimizing Density-Based Ant Colony Stream Clustering Using FPGA-Based Hardware Accelerator.

Jeremy R. Graf, Darshika G. Perera

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

Edge Computing-based Adaptive Machine Learning Model for Dynamic IoT Environment.

Muhammad Arif, Darshika G. Perera

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022

Composing Optimized Embedded Software Architectures for Physics-Based EKF-MPC Smart Sensor for Li-Ion Battery Cell Management.

Anne K. Madsen, Darshika G. Perera

Sensors, 2022

2021

Intelligent Cognitive Radio Architecture Applying Machine Learning and Reconfigurability.

Jari Nurmi, Darshika G. Perera

Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2021, Oslo, 2021

2020

Towards Composing Optimized Bi-Directional Multi-Ported Memories for Next-Generation FPGAs.

S. Navid Shahrouzi, Arkan Alkamil, Darshika G. Perera

IEEE Access, 2020

Towards Dynamic and Partial Reconfigurable Hardware Architectures for Cryptographic Algorithms on Embedded Devices.

Arkan Alkamil, Darshika G. Perera

IEEE Access, 2020

An Optimized FPGA-Based Hardware Accelerator for Physics-Based EKF for Battery Cell Management.

Anne K. Madsen, Michael Scott Trimboli, Darshika G. Perera

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A Quad Joint Relational Feature for 3D Skeletal Action Recognition with Circular CNNs.

P. V. V. Kishore, Darshika G. Perera, Maddala Teja Kiran Kumar, Dande Anil Kumar, Kiran Kumar Eepuri

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019

Optimized hardware accelerators for data mining applications on embedded platforms: Case study principal component analysis.

S. Navid Shahrouzi, Darshika G. Perera

Microprocess. Microsystems, 2019

A design methodology for mobile and embedded applications on FPGA-based dynamic reconfigurable hardware.

Darshika G. Perera, Kin Fun Li

Int. J. Embed. Syst., 2019

A Fast and Secure Pipelined Barrel Processor for Safety-Critical Applications for Real-Time Operating Systems.

Mong Tee Sim, Darshika G. Perera

Proceedings of the 10th IEEE Annual Ubiquitous Computing, 2019

Efficient FPGA-Based Reconfigurable Accelerators for SIMON Cryptographic Algorithm on Embedded Platforms.

Arkan Alkamil, Darshika G. Perera

Proceedings of the 2019 International Conference on ReConFigurable Computing and FPGAs, 2019

HDL Code Optimizations: Impact on Hardware Implementations and CAD Tools.

S. Navid Shahrouzi, Darshika G. Perera

Proceedings of the IEEE Pacific Rim Conference on Communications, 2019

2018

Efficient embedded architectures for fast-charge model predictive controller for battery cell management in electric vehicles.

Anne K. Madsen, Darshika G. Perera

EURASIP J. Embed. Syst., 2018

Optimized Counter-Based Multi-Ported Memory Architectures for Next-Generation FPGAs.

S. Navid Shahrouzi, Darshika G. Perera

Proceedings of the 31st IEEE International System-on-Chip Conference, 2018

An FPGA-Based Hardware Accelerator for K-Nearest Neighbor Classification for Machine Learning on Mobile Devices.

Mokhles A. Mohsin, Darshika G. Perera

Proceedings of the 9th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, 2018

2017

Dynamic partial reconfigurable hardware architecture for principal component analysis on mobile and embedded devices.

S. Navid Shahrouzi, Darshika G. Perera

EURASIP J. Embed. Syst., 2017

An efficient FPGA-based memory architecture for compute-intensive applications on embedded devices.

S. Navid Shahrouzi, Darshika G. Perera

Proceedings of the IEEE Pacific Rim Conference on Communications, 2017

A fast and scalable FPGA-based parallel processing architecture for K-means clustering for big data analysis.

Ramprasad Raghavan, Darshika G. Perera

Proceedings of the IEEE Pacific Rim Conference on Communications, 2017

An efficient embedded multi-ported memory architecture for next-generation FPGAs.

S. Navid Shahrouzi, Darshika G. Perera

Proceedings of the 28th IEEE International Conference on Application-specific Systems, 2017

2015

Analysis of FPGA-Based Reconfiguration Methods for Mobile and Embedded Applications.

Darshika G. Perera

Proceedings of the 12th FPGAworld Conference 2015, 2015

Analysis of Computational Models and Application Characteristics Suitable for Reconfigurable FPGAs.

Darshika G. Perera, Kin Fun Li

Proceedings of the 10th International Conference on P2P, 2015

2013

A Hardware Collective Intelligence Agent.

Kin Fun Li, Darshika G. Perera

Trans. Comput. Collect. Intell., 2013

2011

FPGA-Based Reconfigurable Hardware for Compute Intensive Data Mining Applications.

Darshika G. Perera, Kin Fun Li

Proceedings of the 2011 International Conference on P2P, 2011

2009

Similarity Computation Using Reconfigurable Embedded Hardware.

Darshika G. Perera, Kin Fun Li

Proceedings of the Eighth IEEE International Conference on Dependable, 2009

2008

Parallel Computation of Similarity Measures Using an FPGA-Based Processor Array.

Darshika G. Perera, Kin Fun Li

Proceedings of the 22nd International Conference on Advanced Information Networking and Applications, 2008

2007

An Investigation of Chip-Level Hardware Support for Web Mining.

Kin Fun Li, Darshika G. Perera

Proceedings of the 21st International Conference on Advanced Information Networking and Applications (AINA 2007), 2007