Darko Zivanovic

Orcid: 0000-0003-2335-0006

According to our database1, Darko Zivanovic authored at least 7 papers between 2015 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2020
Cost-aware prediction of uncorrected DRAM errors in the field.
Proceedings of the International Conference for High Performance Computing, 2020

2019
DRAM errors in the field: a statistical approach.
Proceedings of the International Symposium on Memory Systems, 2019

2018
Memory systems for high-performance computing: the capacity and reliability implications.
PhD thesis, 2018

Mainstream vs. Emerging HPC: Metrics, Trade-Offs and Lessons Learned.
Proceedings of the 30th International Symposium on Computer Architecture and High Performance Computing, 2018

2017
Main Memory in HPC: Do We Need More or Could We Live with Less?
ACM Trans. Archit. Code Optim., 2017

2016
Large-Memory Nodes for Energy Efficient High-Performance Computing.
Proceedings of the Second International Symposium on Memory Systems, 2016

2015
Another Trip to the Wall: How Much Will Stacked DRAM Benefit HPC?
Proceedings of the 2015 International Symposium on Memory Systems, 2015


  Loading...