Dariusz Koscielnik

According to our database, Dariusz Koscielnik authored at least 27 papers between 2006 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2023

A New Successive Time Balancing Time-to-Digital Conversion Method.

Konrad Jurasz, Dariusz Koscielnik, Jakub Szyduczynski, Witold Machowski

Sensors, December, 2023

2021

Systematization and Comparison of the Binary Successive Approximation Variants.

Konrad Jurasz, Dariusz Koscielnik, Jakub Szyduczynski, Marek Miskowicz

Sensors, 2021

2020

Successive Approximation Time-to-Digital Converters.

Jakub Szyduczynski, Dariusz Koscielnik, Konrad Jurasz, Marek Miskowicz

Proceedings of the 6th International Conference on Event-Based Control, 2020

2019

A Successive Approximation Time-to-Digital Converter with Single Set of Delay Lines for Time Interval Measurements.

Jakub Szyduczynski, Dariusz Koscielnik, Marek Miskowicz

Sensors, 2019

Behavioral Modelling and Optimization of a Cyclic Feedback-Based Successive Approximation TDC with Dynamic Delay Equalization.

Jakub Szyduczynski, Viet Nguyen, Filippo Schembari, Robert Bogdan Staszewski, Dariusz Koscielnik, Marek Miskowicz

Proceedings of the 5th International Conference on Event-Based Control, 2019

2018

Reconstruction of Signals From Level-Crossing Samples Using Implicit Information.

Dominik Rzepka, Marek Miskowicz, Dariusz Koscielnik, Nguyen T. Thao

IEEE Access, 2018

2017

Bandwidth Estimation From Multiple Level-Crossings of Stochastic Signals.

Dominik Rzepka, Miroslaw Pawlak, Dariusz Koscielnik, Marek Miskowicz

IEEE Trans. Signal Process., 2017

Dynamic equalization of logic delays in feedback-based successive approximation TDCs.

Jakub Szyduczynski, Dariusz Koscielnik, Marek Miskowicz

Proceedings of the 3rd International Conference on Event-Based Control, 2017

Clockless signal-dependent compressive sensing of multitone signals using time encoding machine.

Dominik Rzepka, Dariusz Koscielnik, Marek Miskowicz

Proceedings of the 3rd International Conference on Event-Based Control, 2017

2016

Sample-and-Hold Asynchronous Sigma-Delta Time Encoding Machine.

Dariusz Koscielnik, Dominik Rzepka, Jakub Szyduczynski

IEEE Trans. Circuits Syst. II Express Briefs, 2016

Signal recovery from level-crossing samples using projections onto convex sets.

Dominik Rzepka, Dariusz Koscielnik, Marek Miskowicz, Nguyen T. Thao

Proceedings of the Second International Conference on Event-based Control, 2016

Optimized design of successive approximation time-to-digital converter with single set of delay lines.

Dariusz Koscielnik, Jakub Szyduczynski, Dominik Rzepka, Wojciech Andrysiewicz, Marek Miskowicz

Proceedings of the Second International Conference on Event-based Control, 2016

2015

Analytical approach to multiple memoryless backoff contention analysis.

Marek Miskowicz, Jakub Szyduczynski, Dariusz Koscielnik

Proceedings of the IEEE World Conference on Factory Communication Systems, 2015

I2C hardware master serial interface for asynchronous ADCs.

Wojciech Andrysiewicz, Dariusz Koscielnik, Marek Miskowicz

Proceedings of the IEEE International Symposium on Systems Engineering, 2015

2014

Recovery of varying-bandwidth signal for level-crossing sampling.

Dominik Rzepka, Dariusz Koscielnik, Marek Miskowicz

Proceedings of the 2014 IEEE Emerging Technology and Factory Automation, 2014

2013

Upper Bounds on Unsuccessful Transmission Rate in Persistent and Non-Persistent CSMA Protocols.

Dariusz Koscielnik, Marek Miskowicz, Jakub Szyduczynski

Proceedings of the 22nd International Conference on Computer Communication and Networks, 2013

Event-driven analog-to-digital converter with conversion-speed-centric architecture and activity-dependent power consumption.

Dariusz Koscielnik, Marek Miskowicz

Proceedings of 2013 IEEE 18th Conference on Emerging Technologies & Factory Automation, 2013

2012

I2C interface design for hardware master devices.

Lukasz Plachno, Marcin Oleksiak, Dariusz Koscielnik, Marek Jableka

Proceedings of the 11th IFAC Conference on Programmable Devices and Embedded Systems, 2012

2011

Natural compression and expansion characteristics of asynchronous Sigma-Delta ADC.

Dariusz Koscielnik, Marek Miskowicz, Marek Jableka

Proceedings of the 5th International Conference on Signal Processing and Communication Systems, 2011

2010

Simulation Study of the Influence of the Hidden and Exposed Stations for the Efficiency of IEEE 802.15.4 LR-WPAN Networks.

Dariusz Koscielnik

Wirel. Sens. Netw., 2010

Evaluating Maximum Transmission Unreliability in Persistent CSMA Protocol.

Dariusz Koscielnik, Marek Miskowicz

Proceedings of the ICINCO 2010, 2010

Modeling end-to-end reliability in best-effort networked embedded systems.

Marek Miskowicz, Dariusz Koscielnik

Proceedings of 15th IEEE International Conference on Emerging Technologies and Factory Automation, 2010

2009

Towards Asynchronous Signal Processing.

Dariusz Koscielnik, Marek Miskowicz

Proceedings of the ICINCO 2009, Proceedings of the 6th International Conference on Informatics in Control, Automation and Robotics, 2009

Designing Asynchronous Analog-to-digital Converter with I²C Interface.

Dariusz Koscielnik, Marek Miskowicz

Proceedings of 12th IEEE International Conference on Emerging Technologies and Factory Automation, 2009

2007

The Structure of a Control Network Integrated with the S-bus of an ISDN Network.

Dariusz Koscielnik

Proceedings of the Sixth International Conference on Networking (ICN 2007), 2007

Designing Time-to-Digital Converter for Asynchronous ADCs.

Dariusz Koscielnik, Marek Miskowicz

Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), 2007

2006

Analysis of IEEE 802.11E Standard in Terms of Real Time Application Requirements.

Dariusz Koscielnik

Proceedings of the Second International Conference on Wireless and Mobile Communications (ICWMC'06), 2006