Darayus Adil Patel

According to our database, Darayus Adil Patel authored at least 5 papers between 2015 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

SonicFFT: A system architecture for ultrasonic-based FFT acceleration.

Darayus Adil Patel, Viet Phuong Bui, Kevin Tshun Chuan Chai, Amit Lal, Mohamed M. Sabry Aly

Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

2016

Test and characterization methodologies for advanced technology nodes. (Non traduit).

Darayus Adil Patel

PhD thesis, 2016

An Effective Power-Aware At-Speed Test Methodology for IP Qualification and Characterization.

Kapil Juneja, Darayus Adil Patel, Rajesh Kumar Immadi, Balwant Singh, Sylvie Naudet, Pankaj Agarwal, Arnaud Virazel, Patrick Girard

J. Electron. Test., 2016

Analysis of setup and hold margins inside silicon for advanced technology nodes.

Deepak-Kumar Arora, Darayus Adil Patel, Shahabuddin, Sanjay Kumar, Navin Kumar Dayani, Balwant Singh, Sylvie Naudet, Arnaud Virazel, Alberto Bosio

Proceedings of the 17th International Symposium on Quality Electronic Design, 2016

2015

Design and performance parameters of an ultra-low voltage, single supply 32bit processor implemented in 28nm FDSOI technology.

Sylvain Clerc, Fady Abouzeid, Darayus Adil Patel, Jean-Marc Daveau, Cyril Bottoni, Lorenzo Ciampolini, Fabien Giner, David Meyer, Robin Wilson, Philippe Roche, Sylvie Naudet, Arnaud Virazel, Alberto Bosio, Patrick Girard

Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015