Dara Kusic

According to our database, Dara Kusic authored at least 14 papers between 2004 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

ursaPGx: a new R package to annotate pharmacogenetic star alleles using phased whole-genome sequencing data.

Gennaro Calendo, Dara Kusic, Jozef Madzo, Neda Gharani, Laura Scheinfeldt

Frontiers Bioinform., 2024

2011

Combined Power and Performance Management of Virtualized Computing Environments Serving Session-Based Workloads.

Dara Kusic, Nagarajan Kandasamy, Guofei Jiang

IEEE Trans. Netw. Serv. Manag., 2011

Guest editorial.

Daniel Mossé, Julius C. B. Leite, Dara Kusic

Real Time Syst., 2011

2010

A distributed control framework for performance management of virtualized computing environments.

Rui Wang, Dara Kusic, Nagarajan Kandasamy

Proceedings of the 7th International Conference on Autonomic Computing, 2010

Stochastic approximation control of power and tardiness in a three-tier web-hosting cluster.

Julius C. B. Leite, Dara Kusic, Daniel Mossé, Luciano Bertini

Proceedings of the 7th International Conference on Autonomic Computing, 2010

2009

Power and performance management of virtualized computing environments via lookahead control.

Dara Kusic, Jeffrey O. Kephart, James E. Hanson, Nagarajan Kandasamy, Guofei Jiang

Clust. Comput., 2009

2008

Approximation Modeling for the Online Performance Management of Distributed Computing Systems.

Dara Kusic, Nagarajan Kandasamy, Guofei Jiang

IEEE Trans. Syst. Man Cybern. Part B, 2008

2007

Risk-aware limited lookahead control for dynamic resource provisioning in enterprise computing systems.

Dara Kusic, Nagarajan Kandasamy

Clust. Comput., 2007

2006

Reducing power while increasing performance with supercisc.

Alex K. Jones, Raymond Hoare, Dara Kusic, Gayatri Mehta, Joshua Fazekas, John Foster

ACM Trans. Embed. Comput. Syst., 2006

A VLIW Processor With Hardware Functions: Increasing Performance While Reducing Power.

Alex K. Jones, Raymond R. Hoare, Dara Kusic, Justin Stander, Gayatri Mehta, Joshua Fazekas

IEEE Trans. Circuits Syst. II Express Briefs, 2006

Rapid VLIW Processor Customization for Signal Processing Applications Using Combinational Hardware Functions.

Raymond R. Hoare, Alex K. Jones, Dara Kusic, Joshua Fazekas, John Foster, Shen Chih Tung, Michael L. McCloud

EURASIP J. Adv. Signal Process., 2006

2005

Extracting Speedup From C-Code With Poor Instruction-Level Parallelism.

Dara Kusic, Raymond Hoare, Alex K. Jones, Joshua Fazekas, John Foster

Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005

An FPGA-based VLIW processor with custom hardware execution.

Alex K. Jones, Raymond Hoare, Dara Kusic, Joshua Fazekas, John Foster

Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, 2005

2004

A 64-way VLIW/SIMD FPGA architecture and design flow.

Alex K. Jones, Raymond Hoare, Ivan S. Kourtev, Joshua Fazekas, Dara Kusic, John Foster, Sedric Boddie, Ahmed Muaydh

Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004