Daniele Rossi
Orcid: 0000-0002-9487-378XAffiliations:
- University of Westminster, London, UK
- University of Southampton, UK (former)
- University of Bologna, Italy (PhD 2005)
According to our database1,
Daniele Rossi
authored at least 96 papers
between 2002 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
2005
2010
2015
2020
0
5
10
2
1
2
1
2
4
3
4
1
3
1
1
3
2
4
1
1
1
5
3
1
1
2
2
2
2
3
1
1
2
3
4
1
2
1
5
5
3
7
2
1
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on orcid.org
On csauthors.net:
Bibliography
2024
Design and Experimental Verification of a 6.25-GHz PLL for Harsh Temperature Conditions in 65-nm CMOS Technology.
IEEE Trans. Instrum. Meas., 2024
HW-SW Interface Design and Implementation for Error Logging and Reporting for RAS Improvement.
IEEE Access, 2024
RTL Flow for the Power Side-Channel Resilience Assessment of a Post-Quantum SHA-3 Accelerator.
Proceedings of the 13th International Conference on Modern Circuits and Systems Technologies, 2024
2023
A 10 Gb/s Line Driver in 65 nm CMOS Technology for Radiation-Pervaded and High-Temperature Applications.
IEEE Access, 2023
Embedded Platforms for Trusted Edge Computing Towards Quality Assurance Along the Supply Chain.
Proceedings of the 8th South-East Europe Design Automation, 2023
Design and Evaluation of a Peripheral for Integrity Checking to Improve RAS in RISC-V Architectures.
Proceedings of the 8th South-East Europe Design Automation, 2023
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023
Smart Kinetic Floor System for Energy Harvesting and Data Acquisition in High Foot-Traffic Areas.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2023
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2023
2022
IEEE Trans. Emerg. Top. Comput., 2022
IEEE Trans. Emerg. Top. Comput., 2022
Proceedings of the 28th IEEE International Symposium on On-Line Testing and Robust System Design, 2022
A Low-Area, Low-Power, Wide Tuning Range Digitally Controlled Oscillator for Power Management Systems in 28 nm CMOS Technology.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2022
A 2 GHz Wide Tuning Range LC-Tank Digitally Controlled Oscillator in 28 nm CMOS Technology.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2022
2021
IEEE Trans. Very Large Scale Integr. Syst., 2021
Differential Aging Sensor to Detect Recycled ICs using Sub-threshold Leakage Current.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
2020
Proceedings of the 26th IEEE International Symposium on On-Line Testing and Robust System Design, 2020
2019
Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019
Analysis on Retention Time and Adaptive Refresh in Embedded DRAMs with Aging Benefits.
Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019
2018
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
Proceedings of the 24th IEEE International Symposium on On-Line Testing And Robust System Design, 2018
Proceedings of the 23rd IEEE European Test Symposium, 2018
2017
Coarse-Grained Online Monitoring of BTI Aging by Reusing Power-Gating Infrastructure.
IEEE Trans. Very Large Scale Integr. Syst., 2017
IEEE Trans. Very Large Scale Integr. Syst., 2017
IEEE Trans. Circuits Syst. II Express Briefs, 2017
J. Electron. Test., 2017
Proceedings of the 22nd IEEE European Test Symposium, 2017
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2017
2016
IEEE Trans. Very Large Scale Integr. Syst., 2016
Low-Cost and High-Reduction Approaches for Power Droop during Launch-On-Shift Scan-Based Logic BIST.
IEEE Trans. Computers, 2016
The impact of BTI aging on the reliability of level shifters in nano-scale CMOS technology.
Microelectron. Reliab., 2016
Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016
Proceedings of the 2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2016
2015
IEEE Trans. Very Large Scale Integr. Syst., 2015
IEEE Trans. Very Large Scale Integr. Syst., 2015
IEEE Trans. Very Large Scale Integr. Syst., 2015
DFT Architecture With Power-Distribution-Network Consideration for Delay-Based Power Gating Test.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015
Proceedings of the 21st IEEE International On-Line Testing Symposium, 2015
Proceedings of the 20th IEEE European Test Symposium, 2015
NBTI and leakage aware sleep transistor design for reliable and energy efficient power gating.
Proceedings of the 20th IEEE European Test Symposium, 2015
2014
Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2014
2013
Faults Affecting Energy-Harvesting Circuits of Self-Powered Wireless Sensors and Their Possible Concurrent Detection.
IEEE Trans. Very Large Scale Integr. Syst., 2013
IEEE Trans. Computers, 2013
Low Cost Concurrent Error Detection Strategy for the Control Logic of High Performance Microprocessors and Its Application to the Instruction Decoder.
J. Electron. Test., 2013
Proceedings of the 18th IEEE European Test Symposium, 2013
2012
Faults affecting the control blocks of PV arrays and techniques for their concurrent detection.
Proceedings of the 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2012
High-reliability fault tolerant digital systems in nanometric technologies: Characterization and design methodologies.
Proceedings of the 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2012
2011
Proceedings of the 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2011
Proceedings of the 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
2010
Proceedings of the 2010 East-West Design & Test Symposium, 2010
Proceedings of the 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2010
Low cost and low intrusive approach to test on-line the scheduler of high performance microprocessors.
Proceedings of the 7th Conference on Computing Frontiers, 2010
Proceedings of the 7th Conference on Computing Frontiers, 2010
2009
IEEE Trans. Very Large Scale Integr. Syst., 2009
Proceedings of the 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2009
2008
IEEE Trans. Very Large Scale Integr. Syst., 2008
J. Electron. Test., 2008
IEEE Des. Test Comput., 2008
Proceedings of the 13th European Test Symposium, 2008
Function-Inherent Code Checking: A New Low Cost On-Line Testing Approach for High Performance Microprocessor Control Logic.
Proceedings of the 13th European Test Symposium, 2008
2007
IEEE Trans. Computers, 2007
IEEE Trans. Computers, 2007
Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007
2006
Proceedings of the 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 2006
Proceedings of the 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 2006
Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Low-cost and highly reliable detector for transient and crosstalk faults affecting FPGA interconnects.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
2005
Proceedings of the 23rd IEEE VLSI Test Symposium (VTS 2005), 2005
Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005
Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005
Proceedings of the 20th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2005), 2005
Proceedings of the 20th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2005), 2005
2004
J. Electron. Test., 2004
Impact of ECCs on Simultaneously Switching Output Noise for On-Chip Busses of High Reliability Systems.
Proceedings of the 10th IEEE International On-Line Testing Symposium (IOLTS 2004), 2004
Proceedings of the 10th IEEE International On-Line Testing Symposium (IOLTS 2004), 2004
Proceedings of the 19th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2004), 2004
2003
J. Electron. Test., 2003
Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003
Proceedings of the 9th IEEE International On-Line Testing Symposium (IOLTS 2003), 2003
Proceedings of the 9th IEEE International On-Line Testing Symposium (IOLTS 2003), 2003
Proceedings of the 9th IEEE International On-Line Testing Symposium (IOLTS 2003), 2003
Proceedings of the 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2003), 2003
Clock Calibration Faults and their Impact on Quality of High Performance Microprocessors.
Proceedings of the 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2003), 2003
Proceedings of the 2003 Design, 2003
2002
Proceedings of the 10th IEEE International Workshop on Memory Technology, 2002
Proceedings of the 8th IEEE International On-Line Testing Workshop (IOLTW 2002), 2002