Daniela Sanchez Lopera
Orcid: 0000-0001-8750-7696
According to our database1,
Daniela Sanchez Lopera
authored at least 15 papers
between 2020 and 2024.
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Bibliography
2024
Leveraging Large Language Models for the Automated Documentation of Hardware Designs.
Proceedings of the 13th Mediterranean Conference on Embedded Computing, 2024
Fake Timer: An Engine for Accurate Timing Estimation in Register Transfer Level Designs.
Proceedings of the 25th International Symposium on Quality Electronic Design, 2024
An Automated Exhaustive Fault Analysis Technique guided by Processor Formal Verification Methods.
Proceedings of the 25th International Symposium on Quality Electronic Design, 2024
2023
Using Graph Neural Networks for Timing Estimations of RTL Intermediate Representations.
Proceedings of the 5th ACM/IEEE Workshop on Machine Learning for CAD, 2023
Proceedings of the IEEE International Conference on Acoustics, 2023
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2023
2022
Microprocess. Microsystems, October, 2022
Proceedings of the 2022 ACM/IEEE Workshop on Machine Learning for CAD, 2022
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
Proceedings of the IEEE International Conference on Acoustics, 2022
2021
Proceedings of the 29th IFIP/IEEE International Conference on Very Large Scale Integration, 2021
Proceedings of the VLSI-SoC: Technology Advancement on SoC Design, 2021
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2021, Oslo, 2021
Proceedings of the 3rd ACM/IEEE Workshop on Machine Learning for CAD, 2021
2020
Proceedings of the MLCAD '20: 2020 ACM/IEEE Workshop on Machine Learning for CAD, 2020