Daniel Ziener
Orcid: 0000-0001-6449-9208Affiliations:
- University of Erlangen-Nuremberg, Germany
According to our database1,
Daniel Ziener
authored at least 47 papers
between 2006 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
Short Paper: Analysis of Vivado implementation strategies regarding side-channel leakage for FPGA-based AES implementations.
Proceedings of the 13th International Workshop on Hardware and Architectural Support for Security and Privacy, 2024
2022
Proceedings of the Architecture of Computing Systems - 35th International Conference, 2022
2021
Proceedings of the 29th Signal Processing and Communications Applications Conference, 2021
Increasing Flexibility of FPGA-based CNN Accelerators with Dynamic Partial Reconfiguration.
Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021
Increasing Side-Channel Resistance by Netlist Randomization and FPGA-Based Reconfiguration.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2021
2020
Proceedings of the International Conference on Field-Programmable Technology, 2020
2019
Proceedings of the International Conference on Field-Programmable Technology, 2019
2018
Microprocess. Microsystems, 2018
CoRR, 2018
Proceedings of the 2018 International Conference on ReConFigurable Computing and FPGAs, 2018
Proceedings of the Architecture of Computing Systems - ARCS 2018, 2018
2017
, 2017
Optimizing scrubbing by netlist analysis for FPGA configuration bit classification and floorplanning.
Integr., 2017
2016
ACM Trans. Reconfigurable Technol. Syst., 2016
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016
Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016
Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016
Proceedings of the FPGAs for Software Programmers, 2016
2015
Proceedings of the Second International Workshop on FPGAs for Software Programmers (FSP 2015).
CoRR, 2015
A co-design approach for accelerated SQL query processing via FPGA-based data filtering.
Proceedings of the 2015 International Conference on Field Programmable Technology, 2015
Proceedings of the 2015 NASA/ESA Conference on Adaptive Hardware and Systems, 2015
2014
Proceedings of the First International Workshop on FPGAs for Software Programmers (FSP 2014).
CoRR, 2014
Minimizing Scrubbing Effort through Automatic Netlist Partitioning and Floorplanning.
Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014
Energy-aware SQL query acceleration through FPGA-based dynamic partial reconfiguration.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014
An automatic netlist and floorplanning approach to improve the MTTR of scrubbing techniques (abstract only).
Proceedings of the 2014 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2014
A Self-Adaptive SEU Mitigation System for FPGAs with an Internal Block RAM Radiation Particle Sensor.
Proceedings of the 22nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2014
2013
Des. Autom. Embed. Syst., 2013
Acceleration of SQL Restrictions and Aggregations through FPGA-Based Dynamic Partial Reconfiguration.
Proceedings of the 21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2013
2012
FPGA-based testbed for timing behavior evaluation of the Controller Area Network (CAN).
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012
On-the-fly Composition of FPGA-Based SQL Query Accelerators Using a Partially Reconfigurable Module Library.
Proceedings of the 2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, 2012
Proceedings of the ARCS 2012 Workshops, 28. Februar - 2. März 2012, München, Germany, 2012
2011
Proceedings of the 2011 International Conference on Field-Programmable Technology, 2011
Runtime stress-aware replica placement on reconfigurable devices under safety constraints.
Proceedings of the 2011 International Conference on Field-Programmable Technology, 2011
Unifying Partitioning and Placement for SAT-Based Exploration of Heterogeneous Reconfigurable SoCs.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011
Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis, 2011
2010
Techniques for Increasing Security and Reliability of IP Cores Embedded in FPGA and ASIC Designs.
PhD thesis, 2010
Proceedings of the 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2010
Proceedings of the Design, Automation and Test in Europe, 2010
Proceedings of the Dynamically Reconfigurable Architectures, 11.07. - 16.07.2010, 2010
2009
Concepts for run-time and error-resilient control flow checking of embedded RISC CPUs.
Int. J. Auton. Adapt. Commun. Syst., 2009
2008
Proceedings of the 2008 International Conference on Field-Programmable Technology, 2008
Proceedings of the Autonomic and Trusted Computing, 5th International Conference, 2008
2006
Proceedings of the 2006 IEEE International Conference on Field Programmable Technology, 2006
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006