Daniel Tille
According to our database1,
Daniel Tille
authored at least 27 papers
between 2007 and 2024.
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Bibliography
2024
IEEE Des. Test, December, 2024
2023
IEEE Trans. Very Large Scale Integr. Syst., June, 2023
A Novel LBIST Signature Computation Method for Automotive Microcontrollers using a Digital Twin.
Proceedings of the 41st IEEE VLSI Test Symposium, 2023
An efficient High-Volume Production Performance Screening using On-Chip Ring Oscillators.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023
2022
A Path Selection Flow for Functional Path Ring Oscillators using Physical Design Data.
Proceedings of the IEEE International Test Conference, 2022
Proceedings of the IEEE European Test Symposium, 2022
2021
IEEE Trans. Very Large Scale Integr. Syst., 2021
A Scalable Design Flow for Performance Monitors Using Functional Path Ring Oscillators.
Proceedings of the IEEE International Test Conference, 2021
2019
Proceedings of the IEEE International Test Conference, 2019
A Hybrid Embedded Multichannel Test Compression Architecture for Low-Pin Count Test Environments in Safety-Critical Systems.
Proceedings of the IEEE International Test Conference in Asia, 2019
Proceedings of the 24th IEEE European Test Symposium, 2019
2018
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018
2017
Proceedings of the International Test Conference in Asia, 2017
2016
Formal Test Point Insertion for Region-based Low-Capture-Power Compact At-Speed Scan Test.
Proceedings of the 25th IEEE Asian Test Symposium, 2016
2014
Proceedings of the 9th International Design and Test Symposium, 2014
2010
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010
Efficient test generation with maximal crosstalk-induced noise using unconstrained aggressor excitation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the 15th European Test Symposium, 2010
2009
Effiziente Erfüllbarkeitsalgorithmen für die Generierung von Testmustern (Efficient Satisfiability Solving Algorithms for Test Pattern Generation).
it Inf. Technol., 2009
Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2009
Proceedings of the Eighteentgh Asian Test Symposium, 2009
Springer, ISBN: 978-90-481-2359-9, 2009
2008
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008
Proceedings of the Evolutionary Test Generation, 24.08. - 29.08.2008, 2008
2007
Proceedings of the 37th International Symposium on Multiple-Valued Logic, 2007
Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), 2007