Daniel Séverac
According to our database1,
Daniel Séverac
authored at least 6 papers
between 2008 and 2016.
Collaborative distances:
Collaborative distances:
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Bibliography
2016
11.5 A 3.2×1.5×0.8mm3 240nA 1.25-to-5.5V 32kHz-DTCXO RTC module with an overall accuracy of µ1ppm and an all-digital 0.1ppm compensation-resolution scheme at 1Hz.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
Sub-threshold latch-based icyflex2 32-bit processor with wide supply range operation.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016
2015
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
2013
Ultra low-power standard cell design using planar bulk CMOS in subthreshold operation.
Proceedings of the 2013 23rd International Workshop on Power and Timing Modeling, 2013
2010
A 1V RF SoC with an 863-to-928MHz 400kb/s radio and a 32b Dual-MAC DSP core for Wireless Sensor and Body Networks.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
2008