Daniel Senderowicz

According to our database1, Daniel Senderowicz authored at least 9 papers between 1989 and 2002.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

1990
1992
1994
1996
1998
2000
2002
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1
2
3
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1
1
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Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2002
Embedded anti-aliasing in switched-capacitor ladder filters with variable gain and offset compensation.
IEEE J. Solid State Circuits, 2002

2001
CDMA functional blocks using recycling integrator correlators-matched filters and delay-locked loops.
IEEE J. Solid State Circuits, 2001

Embedded anti-aliasing in switched-capacitor ladder filters.
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001

2000
A 2-V 3.7-mW delay locked-loop using recycling integrator correlators for a 5-Mcps DS-CDMA demodulator.
Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

1997
Low-voltage double-sampled ΣΔ converters.
IEEE J. Solid State Circuits, 1997

1991
A CMOS bandgap reference for differential signal processing.
IEEE J. Solid State Circuits, January, 1991

1990
PCM telephony: reduced architecture for a D/A converter and filter combination.
IEEE J. Solid State Circuits, August, 1990

1989
A fully differential sample-and-hold circuit for high-speed applications.
IEEE J. Solid State Circuits, October, 1989

Sigma-delta A/D and D/A for high speed voiceband modems.
Proceedings of the IEEE International Conference on Acoustics, 1989


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