Daniel R. Knebel
According to our database1,
Daniel R. Knebel
authored at least 12 papers
between 1997 and 2007.
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Bibliography
2007
IEEE Trans. Circuits Syst. II Express Briefs, 2007
2004
Experimental measurement of a novel power gating structure with intermediate power saving mode.
Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004
2003
Application of an SOI 0.12-µm CMOS technology to SoCs with low-power and high-frequency circuits.
IBM J. Res. Dev., 2003
IBM J. Res. Dev., 2003
Understanding and minimizing ground bounce during mode transition of power gating structures.
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003
Minimizing inductive noise in system-on-a-chip with multiple power gating structures.
Proceedings of the ESSCIRC 2003, 2003
2000
Non-invasive timing analysis of IBM G6 microprocessor L1 cache using picosecond imaging circuit analysis.
Proceedings of the 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, 2000
1999
Proceedings of the Proceedings IEEE International Test Conference 1999, 1999
The attack of the "Holey Shmoos": a case study of advanced DFD and picosecond imaging circuit analysis (PICA).
Proceedings of the Proceedings IEEE International Test Conference 1999, 1999
1998
Diagnosis and characterization of timing-related defects by time-dependent light emission.
Proceedings of the Proceedings IEEE International Test Conference 1998, 1998
1997
Circuit design techniques for the high-performance CMOS IBM S/390 Parallel Enterprise Server G4 microprocessor.
IBM J. Res. Dev., 1997