Daniel H.-Y. Teng

According to our database, Daniel H.-Y. Teng authored at least 8 papers between 2004 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2020

Selection Criteria of Device under Test and Their Impact on Learning Outcomes of Functional Verification.

Daniel H.-Y. Teng

Proceedings of the IEEE International Conference on Teaching, 2020

2010

A novel scalable parallel architecture for biological neural simulations.

Peyman Pourhaj, Daniel H.-Y. Teng, Khan A. Wahid, Seok-Bum Ko

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

FPGA based pipelined architecture for action potential simulation in biological neural systems.

Peyman Pourhaj, Daniel Hsiang-Yung Teng

Proceedings of the 23rd Canadian Conference on Electrical and Computer Engineering, 2010

A hardware/software codesign of WZ factorization to improve time to solve matrices.

Peng Huang, Alex MacKay, Daniel H.-Y. Teng

Proceedings of the 23rd Canadian Conference on Electrical and Computer Engineering, 2010

2008

Convergence Analysis of Jacobi Iterative Method Using Logarithmic Number System.

Peng Huang, Daniel H.-Y. Teng, Khan A. Wahid, Seok-Bum Ko

Proceedings of the 7th IEEE/ACIS International Conference on Computer and Information Science, 2008

2006

A Novel Current-Mode Cmos Multiple-Valued Logic Neuron.

Daniel H.-Y. Teng

Proceedings of the Canadian Conference on Electrical and Computer Engineering, 2006

2005

Estimation of Average Multiple-Valued Logic Circuit Size Using Monte Carlo Simulation Technique.

Daniel H.-Y. Teng, Ronald J. Bolton

Proceedings of the 35th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2005), 2005

2004

A Self-Restored Current-Mode CMOS Multiple-Valued Logic Design Technique and its Applications.

Daniel H.-Y. Teng, Ronald J. Bolton

Proceedings of the 34th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2004), 2004