Daniel Gruber
Orcid: 0000-0003-2169-0955
According to our database1,
Daniel Gruber
authored at least 15 papers
between 2006 and 2021.
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Bibliography
2021
A 12-b 16-GS/s RF-Sampling Capacitive DAC for Multi-Band Soft Radio Base-Station Applications With On-Chip Transmission-Line Matching Network in 16-nm FinFET.
IEEE J. Solid State Circuits, 2021
10.6 A 12b 16GS/s RF-Sampling Capacitive DAC for Multi-Band Soft-Radio Base-Station Applications with On-Chip Transmission-Line Matching Network in 16nm FinFET.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
10.7 A 64GS/s 4×-Interpolated 1b Semi-Digital FIR DAC for Wideband Calibration and BIST of RF-Sampling A/D Converters.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
@An automated self-service multi-cloud HPC platform applied to the simulation of cardiac valve disease with machine learning.
Proceedings of the 14th IEEE International Conference on Cloud Computing, 2021
2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
2018
Fully-digital transmitter architectures and circuits for the next generation of wireless communications.
Elektrotech. Informationstechnik, 2018
2017
13.2 A digital multimode polar transmitter supporting 40MHz LTE Carrier Aggregation in 28nm CMOS.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
2016
Digital compensation of DC-DC converter voltage ripple for Switched-Capacitor Power Amplifiers.
Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016
2013
Application of a generic simulation model to optimize production and workforce planning at an automotive supplier.
Proceedings of the Winter Simulations Conference: Simulation Making Decisions in a Complex World, 2013
2012
Proceedings of the 38th European Solid-State Circuit conference, 2012
2008
A 1.5V 13bit 130-300MS/s self-calibrated DAC with active output stage and 50MHz signal bandwidth in 0.13μm CMOS.
Proceedings of the ESSCIRC 2008, 2008
Proceedings of the Pattern Recognition, 2008
2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006