Daniel Gregorek
Orcid: 0000-0003-1412-797X
According to our database1,
Daniel Gregorek
authored at least 18 papers
between 2013 and 2023.
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Bibliography
2023
Long-Endurance Optical Seafloor Imaging Using Underwater Gliders: Concept, Development and Initial Trials.
IROS, 2023
2022
Towards Dynamic Fault Tolerance for Hardware-Implemented Artificial Neural Networks: A Deep Learning Approach.
CoRR, 2022
2019
DRACON: A Dedicated Hardware Infrastructure for Scalable Run-Time Management on Many-Core Systems.
IEEE Access, 2019
Efficient Initialization of Iterative Linear Massive MIMO Uplink Detectors by Binary Jacobi Synthesis.
Proceedings of the 23rd International ITG Workshop on Smart Antennas, 2019
Parallel Data Reduction Method for an Industrial Massive MIMO Detector using "Tall Skinny QR" Decomposition.
Proceedings of the 23rd International ITG Workshop on Smart Antennas, 2019
FPGA Prototyping of a High-Resolution TerraSAR-X Image Processor for Iceberg Detection.
Proceedings of the 53rd Asilomar Conference on Signals, Systems, and Computers, 2019
2018
The Agamid design-space exploration framework - Task-accurate simulation of hardware-enhanced run-time management for many-core.
Des. Autom. Embed. Syst., 2018
Random Subsampling based Signal Detection for Spatial Correlated Massive MIMO Channels.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2015
Transaction Level Analysis for a Clustered and Hardware-Enhanced Task Manager on Homogeneous Many-Core Systems.
CoRR, 2015
Proceedings of the Workshop on High Performance Energy Efficient Embedded Systems (HIP3ES) 2015.
CoRR, 2015
Proceedings of the 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2015
Predictable photonic interconnects using an autonomous channel management and a TDMA-NoC.
Proceedings of the 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2015
A decentralised, autonomous, and congestion-aware thermal monitoring infrastructure for photonic network-on-chip.
Proceedings of the 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2015
The DRACON Embedded Many-Core: Hardware-Enhanced Run-Time Management Using a Network of Dedicated Control Nodes.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
2014
A transaction-level framework for design-space exploration of hardware-enhanced operating systems.
Proceedings of the 2014 International Symposium on System-on-Chip, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
2013
A Scalable Hardware Implementation of a Best-Effort Scheduler for Multicore Processors.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013