Daniel Brand

Orcid: 0000-0001-6081-6587

According to our database1, Daniel Brand authored at least 61 papers between 1975 and 2023.

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Awards

IEEE Fellow

IEEE Fellow 2001, "For contributions to the development of automated logic synthesis of VLSI chips.".

Timeline

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Bibliography

2023
Towards Bridging the Gap Between Conditional and Syllogistic Reasoning.
Proceedings of the 45th Annual Meeting of the Cognitive Science Society, 2023

Are Facial Expressions Predictors for the Sense of Agency in a Dot Control Task?
Proceedings of the 45th Annual Meeting of the Cognitive Science Society, 2023

Effect of Response Format on Syllogistic Reasoning.
Proceedings of the 45th Annual Meeting of the Cognitive Science Society, 2023

2022
Model-Based Explanation of Feedback Effects in Syllogistic Reasoning.
Top. Cogn. Sci., 2022

Predicting Individual Discomfort in Autonomous Driving.
Proceedings of the 44th Annual Meeting of the Cognitive Science Society, 2022

Evidence for Multiple Mechanisms Underlying List-Method Directed Forgetting.
Proceedings of the 44th Annual Meeting of the Cognitive Science Society, 2022

Generalizing Syllogistic Reasoning: Extending Syllogisms to General Quantifiers.
Proceedings of the 44th Annual Meeting of the Cognitive Science Society, 2022

Rule-Based Categorization: Measuring the Cognitive Costs of Intentional Rule Updating.
Proceedings of the 44th Annual Meeting of the Cognitive Science Society, 2022

2021
Unifying Models for Belief and Syllogistic Reasoning.
Proceedings of the 43rd Annual Meeting of the Cognitive Science Society, 2021

2020
Predictive Modeling of Individual Human Cognition: Upper Bounds and a New Perspective on Performance.
Top. Cogn. Sci., 2020

Modeling Human Syllogistic Reasoning: The Role of "No Valid Conclusion".
Top. Cogn. Sci., 2020

Uncovering the Data-Related Limits of Human Reasoning Research: An Analysis based on Recommender Systems.
CoRR, 2020

Do Models Capture Individuals? Evaluating Parameterized Models for Syllogistic Reasoning.
Proceedings of the 42th Annual Meeting of the Cognitive Science Society, 2020

Analyzing the Differences in Human Reasoning via Joint Nonnegative Matrix Factorization.
Proceedings of the 42th Annual Meeting of the Cognitive Science Society, 2020

2019
When Does a Reasoner Respond: Nothing Follows?
Proceedings of the 41th Annual Meeting of the Cognitive Science Society, 2019

2018
Training Deep Neural Networks with 8-bit Floating Point Numbers.
Proceedings of the Advances in Neural Information Processing Systems 31: Annual Conference on Neural Information Processing Systems 2018, 2018

Developers' Needs and Severity Conceptions of Usability Problems.
Proceedings of the Mensch und Computer 2018, 2018

The Predictive Power of Heuristic Portfolios in Human Syllogistic Reasoning.
Proceedings of the KI 2018: Advances in Artificial Intelligence, 2018

AdaComp : Adaptive Residual Gradient Compression for Data-Parallel Distributed Training.
Proceedings of the Thirty-Second AAAI Conference on Artificial Intelligence, 2018

2017
MEC: Memory-efficient Convolution for Deep Neural Network.
Proceedings of the 34th International Conference on Machine Learning, 2017

2016
Pointing at the HUD: Gesture Interaction Using a Leap Motion.
Proceedings of the Adjunct Proceedings of the 8th International Conference on Automotive User Interfaces and Interactive Vehicular Applications, 2016

2015
PARADIS: An Efficient Parallel Algorithm for In-place Radix Sort.
Proc. VLDB Endow., 2015

Efficient GPU implementation of convolutional neural networks for speech recognition.
Proceedings of the 16th Annual Conference of the International Speech Communication Association, 2015

2010
A novel analysis space for pointer analysis and its application for bug finding.
Sci. Comput. Program., 2010

2008
Flexible pointer analysis using assign-fetch graphs.
Proceedings of the 2008 ACM Symposium on Applied Computing (SAC), 2008

2007
Evidence-Based Analysis and Inferring Preconditions for Bug Detection.
Proceedings of the 23rd IEEE International Conference on Software Maintenance (ICSM 2007), 2007

2002
Early analysis tools for system-on-a-chip design.
IBM J. Res. Dev., 2002

2000
LSS: A system for production logic synthesis.
IBM J. Res. Dev., 2000

A Software Falsifier.
Proceedings of the 11th International Symposium on Software Reliability Engineering (ISSRE 2000), 2000

1998
Don't cares in synthesis: theoretical pitfalls and practical solutions.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998

1996
BooleDozer: Logic synthesis for ASICs.
IBM J. Res. Dev., 1996

Inaccuracies in power estimation during logic synthesis.
Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996

1995
Be careful with don't cares.
Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

Efficient use of large don't cares in high-level and logic synthesis.
Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

1994
Identification of redundant delay faults.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994

In the Driver's Seat of BooleDozer.
Proceedings of the Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1994

Incremental synthesis.
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

1993
Exhaustive simulation need not require an exponential number of tests.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993

Minimization of AND-EXOR Expressions Using Rewrite Rules.
IEEE Trans. Computers, 1993

Verification of large synthesized designs.
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

1992
Identification of Single Gate Delay Fault Redundancies.
Proceedings of the Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1992

1989
Synthesis of Pseudo-Random Pattern Testable Designs.
Proceedings of the Proceedings International Test Conference 1989, 1989

1988
Timing Analysis Using Functional Analysis.
IEEE Trans. Computers, 1988

Hill climbing with reduced search space (logic optimization).
Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988

1986
Detecting Sneak Paths in Transistor Networks.
IEEE Trans. Computers, 1986

On typing in prolog.
ACM SIGPLAN Notices, 1986

Technology adaption in logic synthesis.
Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, 1986

1985
Production logic synthesis.
Proceedings of the 13th ACM Annual Conference on Computer Science, 1985

1983
On Communicating Finite-State Machines
J. ACM, April, 1983

Redundancy and Don't Cares in Logic Synthesis.
IEEE Trans. Computers, 1983

1982
Verification of HDLC.
IEEE Trans. Commun., 1982

1980
Towards Analyzing and Synthesizing Protocols.
IEEE Trans. Commun., 1980

1979
Symbolic simulation for correct machine design.
Proceedings of the 16th Design Automation Conference, 1979

1978
A note on data abstractions.
ACM SIGPLAN Notices, 1978

Path Calculus in Program Verification.
J. ACM, 1978

Verification of Protocols Using Symbolic Execution.
Comput. Networks, 1978

Using Machine Descriptions in Program Verification.
Proceedings of the Information Technology '78: Proceedings of the 3rd Jerusalem Conference on Information Technology (JCIT3), 1978

Microprogram verification considered necessary.
Proceedings of the American Federation of Information Processing Societies: 1978 National Computer Conference, 1978

1976
Analytic Resolution in Theorem Proving.
Artif. Intell., 1976

Proving Programs Incorrect.
Proceedings of the Third International Colloquium on Automata, 1976

1975
Proving Theorems with the Modification Method.
SIAM J. Comput., 1975


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