Daniel A. Brokenshire

According to our database, Daniel A. Brokenshire authored at least 9 papers between 2006 and 2011.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2011

Detecting race conditions in asynchronous DMA operations with full system simulation.

Michael Kistler, Daniel A. Brokenshire

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2011

2010

Implementing FFTs on Multicore Architectures.

Alex Chung Hen Chow, Gordon C. Fossum, Daniel A. Brokenshire

Proceedings of the Scientific Computing with Multicore and Accelerators., 2010

2009

Programming the Linpack benchmark for the IBM PowerXCell 8i processor.

Michael Kistler, John A. Gunnels, Daniel A. Brokenshire, Brad Benton

Sci. Program., 2009

Programming the Linpack benchmark for Roadrunner.

Michael Kistler, John A. Gunnels, Daniel A. Brokenshire, Brad Benton

IBM J. Res. Dev., 2009

Petascale computing with accelerators.

Michael Kistler, John A. Gunnels, Daniel A. Brokenshire, Brad Benton

Proceedings of the 14th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2009

2007

Introduction to the Cell Broadband Engine Architecture.

Charles R. Johns, Daniel A. Brokenshire

IBM J. Res. Dev., 2007

Microarchitecture and implementation of the synergistic processor in 65-nm and 90-nm SOI.

Brian K. Flachs, Shigehiro Asano, Sang H. Dhong, H. Peter Hofstee, Gilles Gervais, Roy Kim, Tien Le, Peichun Liu, Jens Leenstra, John S. Liberty, Brad W. Michael, Hwa-Joon Oh, Silvia M. Müller, Osamu Takahashi, Koji Hirairi, Atsushi Kawasumi, Hiroaki Murakami, Hiromi Noro, Shoji Onishi, Juergen Pille, Joel Silberman, Suksoon Yong, Akiyuki Hatakeyama, Yukio Watanabe, Naoka Yano, Daniel A. Brokenshire, Mohammad Peyravian, VanDung To, Eiji Iwata

IBM J. Res. Dev., 2007

2006

The microarchitecture of the synergistic processor for a cell processor.

Brian K. Flachs, Shigehiro Asano, Sang H. Dhong, H. Peter Hofstee, Gilles Gervais, Roy Kim, Tien Le, Peichun Liu, Jens Leenstra, John S. Liberty, Brad W. Michael, Hwa-Joon Oh, Silvia Melitta Müller, Osamu Takahashi, A. Hatakeyama, Yukio Watanabe, Naoka Yano, Daniel A. Brokenshire, Mohammad Peyravian, Vandung To, Eiji Iwata

IEEE J. Solid State Circuits, 2006

An SPU reference model for simulation, random test generation and verification.

Yukio Watanabe, Balazs Sallay, Brad W. Michael, Daniel A. Brokenshire, Gavin Meil, Hazim Shafi, Daisuke Hiraoka

Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006