Dana S. Henry

According to our database1, Dana S. Henry authored at least 10 papers between 1992 and 2003.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

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Bibliography

2003
Exploiting Bias in the Hysteresis Bit of 2-bit Saturating Counters in Branch Predictors.
J. Instr. Level Parallelism, 2003

2002
A Comparison of Asymptotically Scalable Superscalar Processors.
Theory Comput. Syst., 2002

Speculative Clustered Caches for Clustered Processors.
Proceedings of the High Performance Computing, 4th International Symposium, 2002

Applying Machine Learning for Ensemble Branch Predictors.
Proceedings of the Developments in Applied Artificial Intelligence, 2002

Predicting Conditional Branches With Fusion-Based Hybrid Predictors.
Proceedings of the 2002 International Conference on Parallel Architectures and Compilation Techniques (PACT 2002), 2002

2000
Circuits for wide-window superscalar processors.
Proceedings of the 27th International Symposium on Computer Architecture (ISCA 2000), 2000

1999
A Comparison of Scalable Superscalar Processors.
Proceedings of the Eleventh Annual ACM Symposium on Parallel Algorithms and Architectures, 1999

The Ultrascalar Processor-An Asymptotically Scalable Superscalar Microarchitecture.
Proceedings of the 18th Conference on Advanced Research in VLSI (ARVLSI '99), 1999

1996
Hardware mechanisms for efficient interprocessor communication.
PhD thesis, 1996

1992
A Tightly-Coupled Processor-Network Interface.
Proceedings of the ASPLOS-V Proceedings, 1992


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