Dan Stiurca

According to our database, Dan Stiurca authored at least 4 papers between 1994 and 2005.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2005

A fully differential line driver with on-chip calibrated source termination for gigabit and fast Ethernet in a standard 0.13µ CMOS process.

Dan Stiurca

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2001

A low-jitter 125-1250-MHz process-independent and ripple-poleless 0.18-μm CMOS PLL based on a sample-reset loop filter.

Adrian Maxim, Baker Scott, Edmund M. Schneider, Melvin Hagge, Steve Chacko, Dan Stiurca

IEEE J. Solid State Circuits, 2001

Sample-reset loop filter architecture for process independent and ripple-pole-less low jitter CMOS charge-pump PLLs.

Adrian Maxim, Baker Scott, Ed Schneider, Melvin Hagge, Steve Chacko, Dan Stiurca

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

1994

Systematic Generation of Current-Mode Second Order RC Oscillators.

Dan Stiurca

Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994