Dan Li
Orcid: 0000-0003-0721-3167Affiliations:
- Xi'an Jiaotong University, School of Microelectronics, China
According to our database1,
Dan Li
authored at least 32 papers
between 2016 and 2025.
Collaborative distances:
Collaborative distances:
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Bibliography
2025
IEEE Trans. Circuits Syst. II Express Briefs, January, 2025
2024
Signal Integrity Augmentation Techniques for the Design of 64-GBaud Coherent Transimpedance Amplifier in 90-nm SiGe BiCMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., November, 2024
An Integrated Burst-Mode 2R Receiver Employing Fast Residual Offset Canceller for XGS-PON in 40-nm CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2024
2023
A CMOS slew-rate controlled output driver with low process, voltage and temperature variations using a dual-path signal-superposition technique.
IET Circuits Devices Syst., January, 2023
IEEE Trans. Instrum. Meas., 2023
A Reconfigurable Dual-Mode Integrated CMOS Laser Diode Driver for iToF/dToF Based 3D Sensing.
Proceedings of the 18th Conference on Ph.D Research in Microelectronics and Electronics, 2023
Proceedings of the IEEE International Conference on Integrated Circuits, 2023
Proceedings of the IEEE International Conference on Integrated Circuits, 2023
2022
IEEE Trans. Circuits Syst. II Express Briefs, 2022
IEEE Trans. Circuits Syst. II Express Briefs, 2022
Proceedings of the 2022 IEEE International Conference on Integrated Circuits, 2022
A 10/2.5-Gb/s Hyper-Supplied CMOS Low-Noise Burst-Mode TIA with Loud Burst Protection and Gearbox Automatic Offset Cancellation for XGS-PON.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022
2021
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021
A 320×240 I-ToF CMOS Image Sensor with 2-Tap 5.6µm Pixel and Mismatch-Nonlinearity Suppression.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021
Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021
A 720-mVpp 224-Gb/s PAM4 Optical Receiver with Multiple Peaking Techniques in 130-nm SiGe BiCMOS.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2021
2020
IEEE Trans. Very Large Scale Integr. Syst., 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
A Full-duplex Transceiver with Integrated Active Quasi-circulator Achieving Self-interference RF Cancellation over Wide Bandwidth.
Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020
Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020
Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020
2019
Low-Noise Broadband CMOS TIA Based on Multi-Stage Stagger-Tuned Amplifier for High-Speed High-Sensitivity Optical Communication.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
A 13.56 MHz, 94.1% Peak Efficiency CMOS Active Rectifier With Adaptive Delay Time Control for Wireless Power Transmission Systems.
IEEE J. Solid State Circuits, 2019
A Stacked 4×25 Gb/s Optical Receiver in 28 nm CMOS with 0.154 mW/Gb/s Power Efficiency.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Proceedings of the International Conference on IC Design and Technology, 2019
2018
A 50Gb/s-PAM4 CDR with On-Chip Eye Opening Monitor for Reference-Level and Clock-Sampling Adaptation.
Proceedings of the Optical Fiber Communications Conference and Exposition, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018
2017
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
A delay time controlled active rectifier with 95.3% peak efficiency for wireless power transmission systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
2016
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016