Dan Lake
Orcid: 0000-0002-2590-1900
According to our database1,
Dan Lake
authored at least 8 papers
between 2010 and 2023.
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Bibliography
2023
A Charge Domain SRAM Compute-in-Memory Macro With C-2C Ladder-Based 8-Bit MAC Unit in 22-nm FinFET Process for Edge Inference.
IEEE J. Solid State Circuits, 2023
2022
A 32.2 TOPS/W SRAM Compute-in-Memory Macro Employing a Linear 8-bit C-2C Ladder for Charge Domain Computation in 22nm for Edge Inference.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
A 2-to-2.48GHz Voltage-Interpolator-Based Fractional-N Type-I Sampling PLL in 22nm FinFET Assisting Fast Crystal Startup.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
2021
A Back-Sampling Chain Technique for Accelerated Detection, Characterization, and Reconstruction of Radiation-Induced Transient Pulses.
IEEE Trans. Very Large Scale Integr. Syst., 2021
2020
Proceedings of the IEEE Symposium on VLSI Circuits, 2020
2012
Proceedings of the 2012 IEEE Virtual Reality, 2012
2010
Proceedings of the 2010 Winter Simulation Conference, 2010
Distributed scene graph to enable thousands of interacting users in a virtual environment.
Proceedings of the 9th Annual Workshop on Network and Systems Support for Games, 2010