Dajiang Zhou

According to our database, Dajiang Zhou authored at least 107 papers between 2007 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

QuantNAS: Quantization-aware Neural Architecture Search For Efficient Deployment On Mobile Device.

Tianxiao Gao, Li Guo, Shanwei Zhao, Peihan Xu, Yukun Yang, Xionghao Liu, Shihao Wang, Shiai Zhu, Dajiang Zhou

Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2024

2023

Moving Target Detection Method for Passive Radar Using LEO Communication Satellite Constellation.

Hanqing Zhu, Dajiang Zhou, Zhongyu Li, Hongyang An, Chuan Huang, Yun Zhou, Jianyu Yang

Proceedings of the IEEE International Geoscience and Remote Sensing Symposium, 2023

A High Resolution SAR Imaging Method for Moving Target Based on Range Doppler and Particle Swarm Optimization Algorithm.

Dajiang Zhou, Hanqing Zhu, Yulin Huang, Yongchao Zhang, Jianyu Yang, Qingying Yi

Proceedings of the IEEE International Geoscience and Remote Sensing Symposium, 2023

Efficient Deep Models for Real-Time 4K Image Super-Resolution. NTIRE 2023 Benchmark and Report.

Marcos V. Conde, Eduard Zamfir, Radu Timofte, Daniel Motilla, Cen Liu, Zexin Zhang, Yunbo Peng, Yue Lin, Jiaming Guo, Xueyi Zou, Yuyi Chen, Yi Liu, Jia Hao, Youliang Yan, Yuanfan Zhang, Gen Li, Lei Sun, Lingshun Kong, Haoran Bai, Jinshan Pan, Jiangxin Dong, Jinhui Tang, Mustafa Ayazoglu, Bahri Batuhan Bilecen, Mingxi Li, Yuhang Zhang, Xianjun Fan, Yankai Sheng, Long Sun, Zibin Liu, Weiran Gou, Shaoqing Li, Ziyao Yi, Yan Xiang, Dehui Kong, Ke Xu, Ganzorig Gankhuyag, Kihwan Yoon, Jin Zhang, Gaocheng Yu, Feng Zhang, Hongbin Wang, Zhou Zhou, Jiahao Chao, Hongfan Gao, Jiali Gong, Zhengfeng Yang, Zhenbing Zeng, Chengpeng Chen, Zichao Guo, Anjin Park, Yuqing Liu, Qi Jia, Hongyuan Yu, Xuanwu Yin, Dongyang Zhang, Ting Fu, Zhengxue Cheng, Shiai Zhu, Dajiang Zhou, Weichen Yu, Lin Ge, Jiahua Dong, Yajun Zou, Zhuoyuan Wu, Binnan Han, Xiaolin Zhang, Heng Zhang, Ben Shao, Shaolong Zheng, Daheng Yin, Baijun Chen, Mengyang Liu, Marian-Sergiu Nistor, Yi-Chung Chen, Zhi-Kai Huang, Yuan-Chun Chiang, Wei-Ting Chen, Hao-Hsiang Yang, Hua-En Chang, I-Hsiang Chen, Chia-Hsuan Hsieh, Sy-Yen Kuo, Tu Vo, Qingsen Yan, Yun Zhu, Jinqiu Su, Yanning Zhang, Cheng Zhang, Jiaying Luo, Youngsun Cho, Nakyung Lee, Kunlong Zuo

Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2023

2021

Perceptual Image Compression Using Relativistic Average Least Squares GANs.

Zhengxue Cheng, Ting Fu, Jiapeng Hu, Li Guo, Shihao Wang, Xiongxin Zhao, Dajiang Zhou, Yang Song

Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition Workshops, 2021

2018

A Variable-Clock-Cycle-Path VLSI Design of Binary Arithmetic Decoder for H.265/HEVC.

Jinjia Zhou, Dajiang Zhou, Shuping Zhang, Shinji Kimura, Satoshi Goto

IEEE Trans. Circuits Syst. Video Technol., 2018

Approximate-DCT-Derived Measurement Matrices with Row-Operation-Based Measurement Compression and its VLSI Architecture for Compressed Sensing.

Jian-Bin Zhou, Dajiang Zhou, Takeshi Yoshimura, Satoshi Goto

IEICE Trans. Electron., 2018

Lossy Compression for Embedded Computer Vision Systems.

Li Guo, Dajiang Zhou, Jinjia Zhou, Shinji Kimura, Satoshi Goto

IEEE Access, 2018

Sparseness Ratio Allocation and Neuron Re-pruning for Neural Networks Compression.

Li Guo, Dajiang Zhou, Jinjia Zhou, Shinji Kimura

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Embedded Frame Compression for Energy-Efficient Computer Vision Systems.

Li Guo, Dajiang Zhou, Jinjia Zhou, Shinji Kimura

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Quad-multiplier packing based on customized floating point for convolutional neural networks on FPGA.

Zhifeng Zhang, Dajiang Zhou, Shihao Wang, Shinji Kimura

Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

2017

A Dual-Clock VLSI Design of H.265 Sample Adaptive Offset Estimation for 8k Ultra-HD TV Encoding.

Jian-Bin Zhou, Dajiang Zhou, Shihao Wang, Shuping Zhang, Takeshi Yoshimura, Satoshi Goto

IEEE Trans. Very Large Scale Integr. Syst., 2017

Fast Algorithm and VLSI Architecture of Rate Distortion Optimization in H.265/HEVC.

Heming Sun, Dajiang Zhou, Landan Hu, Shinji Kimura, Satoshi Goto

IEEE Trans. Multim., 2017

VLSI Implementation of HEVC Motion Compensation With Distance Biased Direct Cache Mapping for 8K UHDTV Applications.

Shihao Wang, Dajiang Zhou, Jian-Bin Zhou, Takeshi Yoshimura, Satoshi Goto

IEEE Trans. Circuits Syst. Video Technol., 2017

An 8K H.265/HEVC Video Decoder Chip With a New System Pipeline Design.

Dajiang Zhou, Shihao Wang, Heming Sun, Jian-Bin Zhou, Jiayi Zhu, Yijin Zhao, Jinjia Zhou, Shuping Zhang, Shinji Kimura, Takeshi Yoshimura, Satoshi Goto

IEEE J. Solid State Circuits, 2017

Framework and VLSI Architecture of Measurement-Domain Intra Prediction for Compressively Sensed Visual Contents.

Jian-Bin Zhou, Dajiang Zhou, Li Guo, Takeshi Yoshimura, Satoshi Goto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017

A 7-Die 3D Stacked 3840×2160@120 fps Motion Estimation Processor.

Shuping Zhang, Jinjia Zhou, Dajiang Zhou, Shinji Kimura, Satoshi Goto

IEICE Trans. Electron., 2017

Distortion Control and Optimization for Lossy Embedded Compression in Video Codec System.

Li Guo, Dajiang Zhou, Shinji Kimura, Satoshi Goto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017

Accelerating HEVC Inter Prediction with Improved Merge Mode Handling.

Zhengxue Cheng, Heming Sun, Dajiang Zhou, Shinji Kimura

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017

100x Evolution of Video Codec Chips.

Jinjia Zhou, Dajiang Zhou, Satoshi Goto

Proceedings of the 2017 ACM on International Symposium on Physical Design, 2017

Approximate-DCT-derived measurement matrices for compressed sensing.

Jian-Bin Zhou, Dajiang Zhou, Takeshi Yoshimura, Satoshi Goto

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Measurement-domain intra prediction framework for compressively sensed images.

Jian-Bin Zhou, Dajiang Zhou, Li Guo, Takeshi Yoshimura, Satoshi Goto

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Chain-NN: An energy-efficient 1D chain architecture for accelerating deep convolutional neural networks.

Shihao Wang, Dajiang Zhou, Xushen Han, Takeshi Yoshimura

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016

A Low-Power VLSI Architecture for HEVC De-Quantization and Inverse Transform.

Heming Sun, Dajiang Zhou, Shuping Zhang, Shinji Kimura

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2016

HyDMA: low-latency inter-core DMA based on a hybrid packet-circuit switching network-on-chip.

Zhenqi Wei, Peilin Liu, Rongdi Sun, Zunquan Zhou, Ke Jin, Dajiang Zhou

IEICE Electron. Express, 2016

14.7 A 4Gpixel/s 8/10b H.265/HEVC video decoder chip for 8K Ultra HD applications.

Dajiang Zhou, Shihao Wang, Heming Sun, Jian-Bin Zhou, Jiayi Zhu, Yijin Zhao, Jinjia Zhou, Shuping Zhang, Shinji Kimura, Takeshi Yoshimura, Satoshi Goto

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

Frame-level quality and memory traffic allocation for lossy embedded compression in video codec systems.

Li Guo, Dajiang Zhou, Shinji Kimura, Satoshi Goto

Proceedings of the 2016 IEEE International Conference on Multimedia & Expo Workshops, 2016

CNN-MERP: An FPGA-based memory-efficient reconfigurable processor for forward and backward propagation of convolutional neural networks.

Xushen Han, Dajiang Zhou, Shihao Wang, Shinji Kimura

Proceedings of the 34th IEEE International Conference on Computer Design, 2016

2015

A Frame-Parallel 2 Gpixel/s Video Decoder Chip for UHDTV and 3-DTV/FTV Applications.

Jinjia Zhou, Dajiang Zhou, Jiayi Zhu, Satoshi Goto

IEEE Trans. Very Large Scale Integr. Syst., 2015

High-Throughput Power-Efficient VLSI Architecture of Fractional Motion Estimation for Ultra-HD HEVC Video Encoding.

Gang He, Dajiang Zhou, Yunsong Li, Zhixiang Chen, Tianruo Zhang, Satoshi Goto

IEEE Trans. Very Large Scale Integr. Syst., 2015

Ultra-High-Throughput VLSI Architecture of H.265/HEVC CABAC Encoder for UHDTV Applications.

Dajiang Zhou, Jinjia Zhou, Wei Fei, Satoshi Goto

IEEE Trans. Circuits Syst. Video Technol., 2015

High Performance VLSI Architecture of H.265/HEVC Intra Prediction for 8K UHDTV Video Decoder.

Jian-Bin Zhou, Dajiang Zhou, Shihao Wang, Takeshi Yoshimura, Satoshi Goto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2015

Low-Power Motion Estimation Processor with 3D Stacked Memory.

Shuping Zhang, Jinjia Zhou, Dajiang Zhou, Shinji Kimura, Satoshi Goto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2015

Unified Parameter Decoder Architecture for H.265/HEVC Motion Vector and Boundary Strength Decoding.

Shihao Wang, Dajiang Zhou, Jian-Bin Zhou, Takeshi Yoshimura, Satoshi Goto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2015

Merge mode based fast inter prediction for HEVC.

Zhengxue Cheng, Heming Sun, Dajiang Zhou, Shinji Kimura

Proceedings of the 2015 Visual Communications and Image Processing, 2015

An independent bandwidth reduction device for HEVC VLSI video system.

Jiayi Zhu, Li Guo, Dajiang Zhou, Shinji Kimura, Satoshi Goto

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A fixed-complexity HEVC inter mode filtering algorithm based on distribution of IME-FME cost ratio.

Jinjia Zhou, Yizhou Zou, Dajiang Zhou, Satoshi Goto

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Hardware-oriented rate-distortion optimization algorithm for HEVC intra-frame encoder.

Landan Hu, Heming Sun, Dajiang Zhou, Shinji Kimura

Proceedings of the 2015 IEEE International Conference on Multimedia & Expo Workshops, 2015

A full layer parallel QC-LDPC decoder for WiMAX and Wi-Fi.

Wenchao Zhang, Song Chen, Xuefei Bai, Dajiang Zhou

Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2014

High-Performance H.264/AVC Intra-Prediction Architecture for Ultra High Definition Video Applications.

Gang He, Dajiang Zhou, Wei Fei, Zhixiang Chen, Jinjia Zhou, Satoshi Goto

IEEE Trans. Very Large Scale Integr. Syst., 2014

A New Reference Frame Recompression Algorithm and Its VLSI Architecture for UHDTV Video Codec.

Li Guo, Dajiang Zhou, Satoshi Goto

IEEE Trans. Multim., 2014

Alternating asymmetric search range assignment for bidirectional motion estimation in H.265/HEVC and H.264/AVC.

Jinjia Zhou, Dajiang Zhou, Satoshi Goto

J. Vis. Commun. Image Represent., 2014

A 1.59 Gpixel/s Motion Estimation Processor With -211 to +211 Search Range for UHDTV Video Encoder.

Dajiang Zhou, Jinjia Zhou, Gang He, Satoshi Goto

IEEE J. Solid State Circuits, 2014

Fast SAO Estimation Algorithm and Its Implementation for 8K×4K @ 120 FPS HEVC Encoding.

Jiayi Zhu, Dajiang Zhou, Shinji Kimura, Satoshi Goto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2014

A Low-Cost VLSI Architecture of Multiple-Size IDCT for H.265/HEVC.

Heming Sun, Dajiang Zhou, Peilin Liu, Satoshi Goto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2014

Fast Prediction Unit Selection and Mode Selection for HEVC Intra Prediction.

Heming Sun, Dajiang Zhou, Peilin Liu, Satoshi Goto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2014

A low power 720p motion estimation processor with 3D stacked memory.

Shuping Zhang, Jinjia Zhou, Dajiang Zhou, Satoshi Goto

Proceedings of the 22nd International Conference on Very Large Scale Integration, 2014

An area-efficient 4/8/16/32-point inverse DCT architecture for UHDTV HEVC decoder.

Heming Sun, Dajiang Zhou, Jiayi Zhu, Shinji Kimura, Satoshi Goto

Proceedings of the 2014 IEEE Visual Communications and Image Processing Conference, 2014

Unified VLSI Architecture of Motion Vector and Boundary Strength Parameter Decoder for 8K UHDTV HEVC Decoder.

Shihao Wang, Dajiang Zhou, Jian-Bin Zhou, Takeshi Yoshimura, Satoshi Goto

Proceedings of the Advances in Multimedia Information Processing - PCM 2014, 2014

Low-Complexity Rate-Distortion Optimization Algorithms for HEVC Intra Prediction.

Zhe Sheng, Dajiang Zhou, Heming Sun, Satoshi Goto

Proceedings of the MultiMedia Modeling - 20th Anniversary International Conference, 2014

Motion compensation architecture for 8K UHDTV HEVC decoder.

Shihao Wang, Dajiang Zhou, Satoshi Goto

Proceedings of the IEEE International Conference on Multimedia and Expo, 2014

Fast SAO estimation algorithm and its VLSI architecture.

Jiayi Zhu, Dajiang Zhou, Shinji Kimura, Satoshi Goto

Proceedings of the 2014 IEEE International Conference on Image Processing, 2014

VLSI architecture of HEVC intra prediction for 8K UHDTV applications.

Jian-Bin Zhou, Dajiang Zhou, Heming Sun, Satoshi Goto

Proceedings of the 2014 IEEE International Conference on Image Processing, 2014

Reducing power consumption of HEVC codec with lossless reference frame recompression.

Dajiang Zhou, Li Guo, Jinjia Zhou, Satoshi Goto

Proceedings of the 2014 IEEE International Conference on Image Processing, 2014

A 610 Mbin/s CABAC decoder for H.265/HEVC level 6.1 applications.

Yijin Zhao, Jinjia Zhou, Dajiang Zhou, Satoshi Goto

Proceedings of the 2014 IEEE International Conference on Image Processing, 2014

OpenCL based high-quality HEVC motion estimation on GPU.

Fan Wang, Dajiang Zhou, Satoshi Goto

Proceedings of the 2014 IEEE International Conference on Image Processing, 2014

Live demonstration: FPGA based 3840×2160 video decoding and displaying system.

Haoming Zhang, Dajiang Zhou, Satoshi Goto

Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014

2013

A High Performance HEVC De-Blocking Filter and SAO Architecture for UHDTV Decoder.

Jiayi Zhu, Dajiang Zhou, Satoshi Goto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013

A 5.83pJ/bit/iteration High-Parallel Performance-Aware LDPC Decoder IP Core Design for WiMAX in 65nm CMOS.

Xiongxin Zhao, Zhixiang Chen, Xiao Peng, Dajiang Zhou, Satoshi Goto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013

A Dual-Mode Deblocking Filter Design for HEVC and H.264/AVC.

Muchen Li, Jinjia Zhou, Dajiang Zhou, Xiao Peng, Satoshi Goto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013

High-parallel performance-aware LDPC decoder IP core design for WiMAX.

Xiongxin Zhao, Zhixiang Chen, Xiao Peng, Dajiang Zhou, Satoshi Goto

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

An FPGA-based 4K UHDTV H.264/AVC video decoder.

Yue Pan, Dajiang Zhou, Satoshi Goto

Proceedings of the 2013 IEEE International Conference on Multimedia and Expo Workshops, 2013

A combined SAO and de-blocking filter architecture for HEVC video decoder.

Jiayi Zhu, Dajiang Zhou, Gang He, Satoshi Goto

Proceedings of the IEEE International Conference on Image Processing, 2013

A high-performance CABAC encoder architecture for HEVC and H.264/AVC.

Jinjia Zhou, Dajiang Zhou, Wei Fei, Satoshi Goto

Proceedings of the IEEE International Conference on Image Processing, 2013

Lossless embedded compression using multi-mode DPCM & averaging prediction for HEVC-like video codec.

Li Guo, Dajiang Zhou, Satoshi Goto

Proceedings of the 21st European Signal Processing Conference, 2013

A 24.5-53.6pJ/pixel 4320p 60fps H.264/AVC intra-frame video encoder chip in 65nm CMOS.

Dajiang Zhou, Gang He, Wei Fei, Zhixiang Chen, Jinjia Zhou, Satoshi Goto

Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

A 6.72-Gb/s, 8pJ/bit/iteration WPAN LDPC decoder in 65nm CMOS.

Zhixiang Chen, Xiao Peng, Xiongxin Zhao, Leona Okamura, Dajiang Zhou, Satoshi Goto

Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

Transform-based fast mode and depth decision algorithm for HEVC intra prediction.

Gang He, Dajiang Zhou, Satoshi Goto

Proceedings of the IEEE 10th International Conference on ASIC, 2013

2012

An Advanced Hierarchical Motion Estimation Scheme With Lossless Frame Recompression and Early-Level Termination for Beyond High-Definition Video Coding.

Xuena Bao, Dajiang Zhou, Peilin Liu, Satoshi Goto

IEEE Trans. Multim., 2012

DVB-T2 LDPC Decoder with Perfect Conflict Resolution.

Xiongxin Zhao, Zhixiang Chen, Xiao Peng, Dajiang Zhou, Satoshi Goto

IPSJ Trans. Syst. LSI Des. Methodol., 2012

A 115 mW 1 Gbps Bit-Serial Layered LDPC Decoder for WiMAX.

Xiongxin Zhao, Xiao Peng, Zhixiang Chen, Dajiang Zhou, Satoshi Goto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2012

A 4320p 60fps H.264/AVC intra-frame encoder chip with 1.41Gbins/s CABAC.

Dajiang Zhou, Gang He, Wei Fei, Zhixiang Chen, Jinjia Zhou, Satoshi Goto

Proceedings of the Symposium on VLSI Circuits, 2012

De-blocking Filter Design for HEVC and H.264/AVC.

Muchen Li, Jinjia Zhou, Dajiang Zhou, Xiao Peng, Satoshi Goto

Proceedings of the Advances in Multimedia Information Processing - PCM 2012, 2012

A 2Gpixel/s H.264/AVC HP/MVC video decoder chip for Super Hi-Vision and 3DTV/FTV applications.

Dajiang Zhou, Jinjia Zhou, Jiayi Zhu, Peilin Liu, Satoshi Goto

Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

A Low-Complexity HEVC Intra Prediction Algorithm Based on Level and Mode Filtering.

Heming Sun, Dajiang Zhou, Satoshi Goto

Proceedings of the 2012 IEEE International Conference on Multimedia and Expo, 2012

Interlaced asymmetric search range assignment for bidirectional motion estimation.

Jinjia Zhou, Dajiang Zhou, Satoshi Goto

Proceedings of the 19th IEEE International Conference on Image Processing, 2012

An optimized MC interpolation architecture for HEVC.

Zhengyan Guo, Dajiang Zhou, Satoshi Goto

Proceedings of the 2012 IEEE International Conference on Acoustics, 2012

A 1991 Mpixels/s intra prediction architecture for Super Hi-Vision H.264/AVC encoder.

Gang He, Dajiang Zhou, Jinjia Zhou, Satoshi Goto

Proceedings of the 20th European Signal Processing Conference, 2012

2011

A 530 Mpixels/s 4096x2160@60fps H.264/AVC High Profile Video Decoder Chip.

Dajiang Zhou, Jinjia Zhou, Xun He, Jiayi Zhu, Ji Kong, Peilin Liu, Satoshi Goto

IEEE J. Solid State Circuits, 2011

Cache Based Motion Compensation Architecture for Quad-HD H.264/AVC Video Decoder.

Jinjia Zhou, Dajiang Zhou, Gang He, Satoshi Goto

IEICE Trans. Electron., 2011

A 530 Mpixels/s Intra Prediction Architecture for Ultra High Definition H.264/AVC Encoder.

Gang He, Dajiang Zhou, Jinjia Zhou, Tianruo Zhang, Satoshi Goto

IEICE Trans. Electron., 2011

A 98 GMACs/W 32-Core Vector Processor in 65 nm CMOS.

Xun He, Xin Jin, Minghui Wang, Dajiang Zhou, Satoshi Goto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2011

A 6.72-Gb/s 8 pJ/bit/iteration IEEE 802.15.3c LDPC Decoder Chip.

Zhixiang Chen, Xiao Peng, Xiongxin Zhao, Leona Okamura, Dajiang Zhou, Satoshi Goto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2011

Ultra low power QC-LDPC decoder with high parallelism.

Ying Cui, Xiao Peng, Zhixiang Chen, Xiongxin Zhao, Yichao Lu, Dajiang Zhou, Satoshi Goto

Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011

A high parallel macro block level layered LDPC decoding architecture based on dedicated matrix reordering.

Qian Xie, Qian He, Xiao Peng, Ying Cui, Zhixiang Chen, Dajiang Zhou, Satoshi Goto

Proceedings of the IEEE Workshop on Signal Processing Systems, 2011

A 98 GMACs/W 32-core vector processor in 65nm CMOS.

Xun He, Dajiang Zhou, Xin Jin, Satoshi Goto

Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011

A 16-65 cycles/MB H.264/AVC motion compensation architecture for Quad-HD applications.

Jinjia Zhou, Dajiang Zhou, Gang He, Satoshi Goto

Proceedings of the 19th European Signal Processing Conference, 2011

A 1 Gbin/s CABAC encoder for H.264/AVC.

Wei Fei, Dajiang Zhou, Satoshi Goto

Proceedings of the 19th European Signal Processing Conference, 2011

A 115mW 1Gbps QC-LDPC decoder ASIC for WiMAX in 65nm CMOS.

Xiao Peng, Zhixiang Chen, Xiongxin Zhao, Dajiang Zhou, Satoshi Goto

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011

2010

High Profile Intra Prediction Architecture for UHD H.264 Decoder.

Xun He, Dajiang Zhou, Jinjia Zhou, Satoshi Goto

IPSJ Trans. Syst. LSI Des. Methodol., 2010

A High Parallelism LDPC Decoder with an Early Stopping Criterion for WiMax and WiFi Application.

Zhixiang Chen, Xiongxin Zhao, Xiao Peng, Dajiang Zhou, Satoshi Goto

IPSJ Trans. Syst. LSI Des. Methodol., 2010

A Bandwidth Optimized, 64 Cycles/MB Joint Parameter Decoder Architecture for Ultra High Definition H.264/AVC Applications.

Jinjia Zhou, Dajiang Zhou, Xun He, Satoshi Goto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010

A High Performance and Low Bandwidth Multi-Standard Motion Compensation Design for HD Video Decoder.

Xianmin Chen, Peilin Liu, Dajiang Zhou, Jiayi Zhu, Xingguang Pan, Satoshi Goto

IEICE Trans. Electron., 2010

Intra prediction architecture for H.264/AVC QFHD encoder.

Gang He, Dajiang Zhou, Jinjia Zhou, Satoshi Goto

Proceedings of the Picture Coding Symposium, 2010

A Bandwidth Reduction Scheme and Its VLSI Implementation for H.264/AVC Motion Vector Decoding.

Jinjia Zhou, Dajiang Zhou, Gang He, Satoshi Goto

Proceedings of the Advances in Multimedia Information Processing - PCM 2010, 2010

An adaptive bandwidth reduction scheme for video coding.

Liu Song, Dajiang Zhou, Xin Jin, Satoshi Goto, Peilin Liu

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

An early stopping criterion for decoding LDPC codes in WiMAX and WiFi standards.

Zhixiang Chen, Xiongxin Zhao, Xiao Peng, Dajiang Zhou, Satoshi Goto

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A lossless frame recompression scheme for reducing DRAM power in video encoding.

Xuena Bao, Dajiang Zhou, Satoshi Goto

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

An advanced hierarchical motion estimation scheme with lossless frame recompression for ultra high definition video coding.

Xuena Bao, Dajiang Zhou, Peilin Liu, Satoshi Goto

Proceedings of the 2010 IEEE International Conference on Multimedia and Expo, 2010

A constant rate bandwidth reduction architecture with adaptive compression mode decision for video decoding.

Liu Song, Dajiang Zhou, Xin Jin, Satoshi Goto

Proceedings of the 18th European Signal Processing Conference, 2010

2009

A 48 Cycles/MB H.264/AVC Deblocking Filter Architecture for Ultra High Definition Applications.

Dajiang Zhou, Jinjia Zhou, Jiayi Zhu, Satoshi Goto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009

An Efficient Motion Vector Coding Scheme Based on Prioritized Reference Decision.

Dajiang Zhou, Jinjia Zhou, Satoshi Goto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009

Prioritized Reference Decision for Efficient Motion Vector Coding.

Dajiang Zhou, Jinjia Zhou, Satoshi Goto

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Block-pipelining Cache for Motion Compensation in High Definition H.264/AVC Video Decoder.

Xianmin Chen, Peilin Liu, Jiayi Zhu, Dajiang Zhou, Satoshi Goto

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

A 136 cycles/MB, luma-chroma parallelized H.264/AVC deblocking filter for QFHD applications.

Jinjia Zhou, Dajiang Zhou, Hang Zhang, Yu Hong, Peilin Liu, Satoshi Goto

Proceedings of the 2009 IEEE International Conference on Multimedia and Expo, 2009

2008

An SDRAM controller optimized for high definition video coding application.

Jiayi Zhu, Peilin Liu, Dajiang Zhou

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007

A Hardware-Efficient Dual-Standard VLSI Architecture for MC Interpolation in AVS and H.264.

Dajiang Zhou, Peilin Liu

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007