Daisuke Kurose

According to our database, Daisuke Kurose authored at least 18 papers between 2003 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2019

Digital Amplifier: A Power-Efficient and Process-Scaling Amplifier for Switched Capacitor Circuits.

Kentaro Yoshioka, Tomohiko Sugimoto, Naoya Waki, Sinnyoung Kim, Daisuke Kurose, Hirotomo Ishii, Masanori Furuta, Akihide Sai, Hiroki Ishikuro, Tetsuro Itakura

IEEE Trans. Very Large Scale Integr. Syst., 2019

2018

A 20-ch TDC/ADC Hybrid Architecture LiDAR SoC for 240 × 96 Pixel 200-m Range Imaging With Smart Accumulation Technique and Residue Quantizing SAR ADC.

Kentaro Yoshioka, Hiroshi Kubota, Tomonori Fukushima, Satoshi Kondo, Tuan Thanh Ta, Hidenori Okuni, Kaori Watanabe, Masatoshi Hirono, Yoshinari Ojima, Katsuyuki Kimura, Sohichiroh Hosoda, Yutaka Ota, Tomohiro Koizumi, Naoyuki Kawabe, Yasuhiro Ishii, Yoichiro Iwagami, Seitaro Yagi, Isao Fujisawa, Nobuo Kano, Tomohiko Sugimoto, Daisuke Kurose, Naoya Waki, Yumi Higashi, Tetsuya Nakamura, Yoshikazu Nagashima, Hirotomo Ishii, Akihide Sai, Nobu Matsumoto

IEEE J. Solid State Circuits, 2018

A 20ch TDC/ADC hybrid SoC for 240×96-pixel 10%-reflection <0.125%-precision 200m-range imaging LiDAR with smart accumulation technique.

Kentaro Yoshioka, Hiroshi Kubota, Tomonori Fukushima, Satoshi Kondo, Tuan Thanh Ta, Hidenori Okuni, Kaori Watanabe, Yoshinari Ojima, Katsuyuki Kimura, Sohichiroh Hosoda, Yutaka Ota, Tomohiro Koizumi, Naoyuki Kawabe, Yasuhiro Ishii, Yoichiro Iwagami, Seitaro Yagi, Isao Fujisawa, Nobuo Kano, Tomohiro Sugimoto, Daisuke Kurose, Naoya Waki, Yumi Higashi, Tetsuya Nakamura, Yoshikazu Nagashima, Hirotomo Ishii, Akihide Sai, Nobu Matsumoto

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2017

28.7 A 0.7V 12b 160MS/s 12.8fJ/conv-step pipelined-SAR ADC in 28nm CMOS with digital amplifier technique.

Kentaro Yoshioka, Tomohiko Sugimoto, Naoya Waki, Sinnyoung Kim, Daisuke Kurose, Hirotomo Ishii, Masanori Furuta, Akihide Sai, Tetsuro Itakura

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2016

A power-scalable zero-crossing-based amplifier using inverter-based zero-crossing detector with CMFB.

Junya Matsuno, Daisuke Kurose, Tomohiko Sugimoto, Hirotomo Ishii, Masanori Furuta, Tetsuro Itakura

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2014

A power supply noise cancellation scheme for a 2.24-GHz 6-bit current-steering DAC.

Kei Shiraishi, Daisuke Kurose, Masanori Furuta, Tetsuro Itakura

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013

Correction to "A 2 Gb/s Throughput CMOS Transceiver Chipset With In-Package Antenna for 60 GHz Short-Range Wireless Communication".

Toshiya Mitomo, Yukako Tsutsumi, Hiroaki Hoshino, Masahiro Hosoya, Tong Wang, Yuta Tsubouchi, Ryoichi Tachibana, Akihide Sai, Yuka Kobayashi, Daisuke Kurose, Tomohiko Ito, Koichiro Ban, Tomoya Tandai, Takeshi Tomizawa

IEEE J. Solid State Circuits, 2013

2012

A 2-Gb/s Throughput CMOS Transceiver Chipset With In-Package Antenna for 60-GHz Short-Range Wireless Communication.

Toshiya Mitomo, Yukako Tsutsumi, Hiroaki Hoshino, Masahiro Hosoya, Tong Wang, Yuta Tsubouchi, Ryoichi Tachibana, Akihide Sai, Yuka Kobayashi, Daisuke Kurose, Tomohiko Ito, Koichiro Ban, Tomoya Tandai, Takeshi Tomizawa

IEEE J. Solid State Circuits, 2012

A -70dBm-sensitivity 522Mbps 0.19nJ/bit-TX 0.43nJ/bit-RX transceiver for TransferJet™ SoC in 65nm CMOS.

Daisuke Miyashita, Kenichi Agawa, Hirotsugu Kajihara, Kenichi Sami, Masaomi Iwanaga, Yosuke Ogasawara, Tomohiko Ito, Daisuke Kurose, Naotaka Koide, Toru Hashimoto, Hiroki Sakurai, Takafumi Yamaji, Takashi Kurihara, Kazumi Sato, Ichiro Seto, Hiroshi Yoshida, Ryuichi Fujimoto, Yasuo Unekawa

Proceedings of the Symposium on VLSI Circuits, 2012

A 2Gb/s-throughput CMOS transceiver chipset with in-package antenna for 60GHz short-range wireless communication.

Toshiya Mitomo, Yukako Tsutsumi, Hiroaki Hoshino, Masahiro Hosoya, Tong Wang, Yuta Tsubouchi, Ryoichi Tachibana, Akihide Sai, Yuka Kobayashi, Daisuke Kurose, Tomohiko Ito, Koichiro Ban, Tomoya Tandai, Takeshi Tomizawa

Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2008

1.2 V, 24 mW/ch, 10 bit, 80 MSample/s Pipelined A/D Converters.

Takeshi Ueno, Tomohiko Ito, Daisuke Kurose, Takafumi Yamaji, Tetsuro Itakura

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008

A Low-Power Low-Noise Clock Signal Generator for Next-Generation Mobile Wireless Terminals.

Akihide Sai, Daisuke Kurose, Takafumi Yamaji, Tetsuro Itakura

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008

55-mW, 1.2-V, 12-bit, 100-MSPS Pipeline ADCs for Wireless Receivers.

Tomohiko Ito, Daisuke Kurose, Takeshi Ueno, Takafumi Yamaji, Tetsuro Itakura

IEICE Trans. Electron., 2008

2006

55-mW 200-MSPS 10-bit pipeline ADCs for wireless receivers.

Daisuke Kurose, Tomohiko Ito, Takeshi Ueno, Takafumi Yamaji, Tetsuro Itakura

IEEE J. Solid State Circuits, 2006

Low-Power Design of 10-bit 80-MSPS Pipeline ADCs.

Tomohiko Ito, Daisuke Kurose, Takeshi Ueno, Takafumi Yamaji, Tetsuro Itakura

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006

2005

A 10-bit, 200-MSPS, 105-mW pipeline A-to-D converter.

Tomohiko Ito, Takeshi Ueno, Daisuke Kurose, Takafumi Yamaji, Tetsuro Itakura

IEICE Electron. Express, 2005

2004

Capacitance Mismatch Evaluation for Low-power Pipeline ADC Design.

Tomohiko Ito, Takafumi Yamaji, Daisuke Kurose, Tetsuro Itakura

IEICE Electron. Express, 2004

2003

A four-input beam-forming downconverter for adaptive antennas.

Takafumi Yamaji, Daisuke Kurose, Osamu Watanabe, Shuichi Obayashi, Tetsuro Itakura

IEEE J. Solid State Circuits, 2003