Daichi Fujiki

Orcid: 0000-0001-7949-0417

According to our database1, Daichi Fujiki authored at least 19 papers between 2016 and 2024.

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Bibliography

2024
Restricted Random Pruning at Initialization for High Compression Range.
Trans. Mach. Learn. Res., 2024

Partial Search in a Frozen Network is Enough to Find a Strong Lottery Ticket.
CoRR, 2024

OSA-HCIM: On-The-Fly Saliency-Aware Hybrid SRAM CIM with Dynamic Precision Configuration.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

2023
HALO-CAT: A Hidden Network Processor with Activation-Localized CIM Architecture and Layer-Penetrative Tiling.
CoRR, 2023

MVC: Enabling Fully Coherent Multi-Data-Views through the Memory Hierarchy with Processing in Memory.
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

Vector-Processing for Mobile Devices: Benchmark and Analysis.
Proceedings of the IEEE International Symposium on Workload Characterization, 2023

2022
Multi-Layer In-Memory Processing.
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022

2021
In-/Near-Memory Computing
Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers, ISBN: 978-3-031-01772-8, 2021

A 2.46M Reads/s Seed-Extension Accelerator for Next-Generation Sequencing Using a String-Independent PE Array.
IEEE J. Solid State Circuits, 2021

2020
SeedEx: A Genome Sequencing Accelerator for Optimal Alignments in Subminimal Space.
Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020

A 2.46M reads/s Genome Sequencing Accelerator using a 625 Processing-Element Array.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020

2019
Near-memory data transformation for efficient sparse matrix multi-vector multiplication.
Proceedings of the International Conference for High Performance Computing, 2019

Duality cache for data parallel acceleration.
Proceedings of the 46th International Symposium on Computer Architecture, 2019

2018
AxNoC: Low-power Approximate Network-on-Chips using Critical-Path Isolation.
Proceedings of the Twelfth IEEE/ACM International Symposium on Networks-on-Chip, 2018

GenAx: A Genome Sequencing Accelerator.
Proceedings of the 45th ACM/IEEE Annual International Symposium on Computer Architecture, 2018

In-Memory Data Parallel Processor.
Proceedings of the Twenty-Third International Conference on Architectural Support for Programming Languages and Operating Systems, 2018

2017
High-Bandwidth Low-Latency Approximate Interconnection Networks.
Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017

In-memory Data Flow Processor.
Proceedings of the 26th International Conference on Parallel Architectures and Compilation Techniques, 2017

2016
Randomizing Packet Memory Networks for Low-Latency Processor-Memory Communication.
Proceedings of the 24th Euromicro International Conference on Parallel, 2016


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