Daeik D. Kim

According to our database1, Daeik D. Kim authored at least 15 papers between 2003 and 2009.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2009
An array of 4 complementary LC-VCOs with 51.4% W-Band coverage in 32nm SOI CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

2008
A 94GHz Locking Hysteresis-Assisted and Tunable CML Static Divider in 65nm SOI CMOS.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

Analog parallelism in ring-based VCOs.
Proceedings of the 45th Design Automation Conference, 2008

Wideband mmWave CML static divider in 65nm SOI CMOS technology.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

Early prediction of product performance and yield via technology benchmark.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007
Performance Variability of a 90GHz Static CML Frequency Divider in 65nm SOI CMOS.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

A 70GHz Manufacturable Complementary LC-VCO with 6.14GHz Tuning Range in 65nm SOI CMOS.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

A Data-Driven Statistical Approach to Analyzing Process Variation in 65nm SOI Technology.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

Statistical Framework for Technology-Model-Product Co-Design and Convergence.
Proceedings of the 44th Design Automation Conference, 2007

Integrated Inductor Actively Engaging Metal Filling Rules.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2006
Mixed-signal implementation of a nonlinear decoder for delta-sigma encoded stream.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Scalable delta-sigma modulator readout architecture for array-based sensor system.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

CMOS Mixed-Signal Circuit Process Variation Sensitivity Characterization for Yield Improvement.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2005
Time-interleaved switched-capacitor filter for reconfigurable triple-band delta-sigma converter.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2003
A 1.4G samples/sec comb filter design for decimation of sigma-delta modulator output.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003


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