Daehyun Kim
Affiliations:- Intel Corporation, Santa Clara, CA, USA
According to our database1,
Daehyun Kim
authored at least 22 papers
between 2005 and 2014.
Collaborative distances:
Collaborative distances:
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Bibliography
2014
Improving Communication Performance and Scalability of Native Applications on Intel Xeon Phi Coprocessor Clusters.
Proceedings of the 2014 IEEE 28th International Parallel and Distributed Processing Symposium, 2014
2013
Efficient backprojection-based synthetic aperture radar computation with many-core processors.
Sci. Program., 2013
Proceedings of the International Conference for High Performance Computing, 2013
Tera-scale 1D FFT with low-communication algorithm and Intel® Xeon Phi™ coprocessors.
Proceedings of the International Conference for High Performance Computing, 2013
2012
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium, 2012
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
2011
High-Performance 3D Compressive Sensing MRI Reconstruction Using Many-Core Architectures.
Int. J. Biomed. Imaging, 2011
2010
Proceedings of the ACM SIGMOD International Conference on Management of Data, 2010
Debunking the 100X GPU vs. CPU myth: an evaluation of throughput computing on CPU and GPU.
Proceedings of the 37th International Symposium on Computer Architecture (ISCA 2010), 2010
2009
Mapping High-Fidelity Volume Rendering for Medical Imaging to CPU, GPU and Many-Core Architectures.
IEEE Trans. Vis. Comput. Graph., 2009
2008
Proc. IEEE, 2008
Proceedings of the 35th International Symposium on Computer Architecture (ISCA 2008), 2008
2007
VLDB J., 2007
Scaling performance of interior-point method on large-scale chip multiprocessor system.
Proceedings of the ACM/IEEE Conference on High Performance Networking and Computing, 2007
Physical simulation for animation and visual effects: parallelization and characterization for chip multiprocessors.
Proceedings of the 34th International Symposium on Computer Architecture (ISCA 2007), 2007
2006
Efficient pattern mining on shared memory systems: implications for chip multiprocessor architectures.
Proceedings of the 2006 workshop on Memory System Performance and Correctness, 2006
2005
Proceedings of the 31st International Conference on Very Large Data Bases, Trondheim, Norway, August 30, 2005
Proceedings of the Workshop on Data Management on New Hardware, 2005
Proceedings of the 42nd Design Automation Conference, 2005