Dae-Hee Jung
According to our database1,
Dae-Hee Jung
authored at least 4 papers
between 2006 and 2017.
Collaborative distances:
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Bibliography
2017
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017
2013
A 1.2 V 30 nm 3.2 Gb/s/pin 4 Gb DDR4 SDRAM With Dual-Error Detection and PVT-Tolerant Data-Fetch Scheme.
IEEE J. Solid State Circuits, 2013
2012
A 1.2V 30nm 3.2Gb/s/pin 4Gb DDR4 SDRAM with dual-error detection and PVT-tolerant data-fetch scheme.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
2006
A 512-mb DDR3 SDRAM prototype with C<sub>IO</sub> minimization and self-calibration techniques.
IEEE J. Solid State Circuits, 2006