D. Y. Lee
According to our database1,
D. Y. Lee
authored at least 3 papers
between 1998 and 2023.
Collaborative distances:
Collaborative distances:
Timeline
2000
2005
2010
2015
2020
0
1
2
1
1
1
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2023
A Comprehensive Study on the Pillar Size of OTS-PCM Memory with an Optimized Process and Scaling Trends Down to Sub-10 nm for SCM Applications.
Proceedings of the IEEE International Memory Workshop, 2023
2006
1998
A 64-Mbit, 640-MByte/s bidirectional data strobed, double-data-rate SDRAM with a 40-mW DLL for a 256-MByte memory system.
IEEE J. Solid State Circuits, 1998