D. V. Poornaiah
According to our database1,
D. V. Poornaiah
authored at least 3 papers
between 1993 and 1996.
Collaborative distances:
Collaborative distances:
Timeline
1993
1994
1995
1996
0
1
2
1
1
1
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Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
1996
A novel VLSI concurrent dual multiplier-dual adder architecture for image and video coding applications.
Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996
1995
Design of a 3-bit Booth recoded novel VLSI concurrent multiplier-accumulator architecture.
Proceedings of the 8th International Conference on VLSI Design (VLSI Design 1995), 1995
1993
Design and VLSI implementation of a novel concurrent 16-bit multiplier-accumulator for DSP applications.
Proceedings of the IEEE International Conference on Acoustics, 1993