D. Sreenivasa Rao

Orcid: 0000-0003-0705-7504

According to our database1, D. Sreenivasa Rao authored at least 9 papers between 1991 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Deep Ridge Regression Neural Network-based hybrid precoder and combiner design.
Multim. Tools Appl., September, 2024

2011
A QoS Estimation-Based Scheduler for Real-Time Traffic in IEEE 802.11e Mobile Ad hoc Networks.
Inf. Secur. J. A Glob. Perspect., 2011

2009
Energy Aware Clustered Based Multipath Routing in Mobile Ad Hoc Networks.
Int. J. Commun. Netw. Syst. Sci., 2009

1995
High-level synthesis in an industrial environment.
IBM J. Res. Dev., 1995

1994
Controller and datapath trade-offs in hierarchical RT-level synthesis.
Proceedings of the 7th International Symposium on High Level Synthesis, 1994

1993
Hierarchical design space exploration for a class of digital systems.
IEEE Trans. Very Large Scale Integr. Syst., 1993

On clustering for maximal regularity extraction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993

1992
Partitioning by Regularity Extraction.
Proceedings of the 29th Design Automation Conference, 1992

1991
An Integrated Approach to Routing and Via Minimization.
Inf. Process. Lett., 1991


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